SLOS918A August   2015  – October 2015 TAS5404-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements for I2C Interface Signals
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Descption
      1. 9.3.1  Preamplifier
      2. 9.3.2  Pulse-Width Modulator (PWM)
      3. 9.3.3  Gate Drive
      4. 9.3.4  Power FETs
      5. 9.3.5  Load Diagnostics
      6. 9.3.6  Protection and Monitoring
      7. 9.3.7  I2C Serial Communication Bus
      8. 9.3.8  I2C Bus Protocol
      9. 9.3.9  Hardware Control Pins
      10. 9.3.10 AM Radio Avoidance
    4. 9.4 Device Functional Modes
      1. 9.4.1 Audio Shutdown and Restart Sequence
      2. 9.4.2 Latched-Fault Shutdown and Restart Sequence Control
    5. 9.5 Programming
      1. 9.5.1 Random Write
      2. 9.5.2 Sequential Write
      3. 9.5.3 Random Read
      4. 9.5.4 Sequential Read
    6. 9.6 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Hardware and Software Design
        2. 10.2.2.2 Parallel Operation (PBTL)
        3. 10.2.2.3 Input Filter Design
        4. 10.2.2.4 Amplifier Output Filtering
        5. 10.2.2.5 Line Driver Applications
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Consideration
    4. 12.4 Electrical Connection of Heat Slug and Heat Sink
    5. 12.5 EMI Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Power Supply Recommendations

A car battery that can have a large voltage range most commonly provides the power for the TAS5404-Q1 device. PVDD is a filtered battery voltage, and it is the supply for the output FETS and the low-side FET gate driver. The supply for the high-side FET gate driver comes from a charge pump (CP). The charge pump supplies the gate-drive voltage for all four channels. An internal linear regulator provides AVDD which powers the analog circuitry. The supply requires a 0.1-μF, 10-V external bypass capacitor at the A_BYP pin. TI does not recommend connecting any external components except the bypass capacitor to the A_BYP pin. DVDD, which comes from an internal linear regulator, powers the digital circuitry. The D_BYP pin requires a 0.1-μF, 10-V external bypass capacitor. TI does not recommend connecting any external components except the bypass capacitor to the A_BYP pin.

The TAS5404-Q1 device can withstand fortuitous open-ground and open-power conditions. Fortuitous open ground usually occurs when a speaker wire shorts to ground, which allows for a second ground path through the body diode in the output FETs. The diagnostic capability allows debugging of the speakers and speaker wires, which eliminates the necessity to remove the amplifier to diagnose the problem.