SLASEH5D May 2018 – November 2020 TAS5805M
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The device has a bidirectional serial control interface that is compatible with the Inter IC ( I2)C bus protocol and supports 100 and 400-kHz data transfer rates for random and sequential write and read operations as a slave device. Because the TAS5805M register map and DSP memory spans multiple pages, users should change from page to page before writing individual registes or DSP memory. Changing from page to page is accomplished by writing to register 0 on each page. Its register value selects the page address, from 0 to 255.