SCPS215G September   2009  – June 2018 TCA8418

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  I2C Interface Timing Requirements
    7. 6.7  Reset Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  Keypad Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Key Events
        1. 8.3.1.1 Key Event Table
        2. 8.3.1.2 General Purpose Input (GPI) Events
        3. 8.3.1.3 Key Event (FIFO) Reading
        4. 8.3.1.4 Key Event Overflow
      2. 8.3.2 Keypad Lock/Unlock
      3. 8.3.3 Keypad Lock Interrupt Mask Timer
      4. 8.3.4 Control-Alt-Delete Support
      5. 8.3.5 Interrupt Output
        1. 8.3.5.1 50 Micro-second Interrupt Configuration
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset (POR)
      2. 8.4.2 Powered (Key Scan Mode)
        1. 8.4.2.1 Idle Key Scan Mode
        2. 8.4.2.2 Active Key Scan Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 Bus Transactions
        1. 8.5.2.1 Writes
        2. 8.5.2.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
        1. 8.6.2.1  Configuration Register (Address 0x01)
        2. 8.6.2.2  Interrupt Status Register, INT_STAT (Address 0x02)
        3. 8.6.2.3  Key Lock and Event Counter Register, KEY_LCK_EC (Address 0x03)
        4. 8.6.2.4  Key Event Registers (FIFO), KEY_EVENT_A–J (Address 0x04–0x0D)
        5. 8.6.2.5  Keypad Lock1 to Lock2 Timer Register, KP_LCK_TIMER (Address 0x0E)
        6. 8.6.2.6  Unlock1 and Unlock2 Registers, UNLOCK1/2 (Address 0x0F-0x10)
        7. 8.6.2.7  GPIO Interrupt Status Registers, GPIO_INT_STAT1–3 (Address 0x11–0x13)
        8. 8.6.2.8  GPIO Data Status Registers, GPIO_DAT_STAT1–3 (Address 0x14–0x16)
        9. 8.6.2.9  GPIO Data Out Registers, GPIO_DAT_OUT1–3 (Address 0x17–0x19)
        10. 8.6.2.10 GPIO Interrupt Enable Registers, GPIO_INT_EN1–3 (Address 0x1A–0x1C)
        11. 8.6.2.11 Keypad or GPIO Selection Registers, KP_GPIO1–3 (Address 0x1D–0x1F)
        12. 8.6.2.12 GPI Event Mode Registers, GPI_EM1–3 (Address 0x20–0x22)
        13. 8.6.2.13 GPIO Data Direction Registers, GPIO_DIR1–3 (Address 0x23–0x25)
        14. 8.6.2.14 GPIO Edge/Level Detect Registers, GPIO_INT_LVL1–3 (Address 0x26–0x28)
        15. 8.6.2.15 Debounce Disable Registers, DEBOUNCE_DIS1–3 (Address 0x29–0x2B)
        16. 8.6.2.16 GPIO pull-up Disable Register, GPIO_PULL1–3 (Address 0x2C–0x2E)
      3. 8.6.3 CAD Interrupt Errata
        1. 8.6.3.1 Description
        2. 8.6.3.2 System Impact
        3. 8.6.3.3 System Workaround
      4. 8.6.4 Overflow Errata
        1. 8.6.4.1 Description
        2. 8.6.4.2 System Impact
        3. 8.6.4.3 System Workaround
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Ghosting Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing the Hardware Layout
        2. 9.2.2.2 Configuring the Registers
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6.2 Control Register and Command Byte

Following the successful acknowledgment of the address byte, the bus master sends a command byte, which is stored in the control register in the TCA8418. The command byte indicates the register that will be updated with information. All registers can be read and written to by the system master.

Table 9 shows all the registers within this device and their descriptions. The default value in all registers is 0.

Table 9. Register Descriptions

ADDRESS REGISTER NAME REGISTER
DESCRIPTION		 7 6 5 4 3 2 1 0
0x00 Reserved Reserved
0x01 CFG Configuration register
(interrupt processor interrupt enables)		 AI GPI_E_CGF OVR_FLOW_M INT_ CFG OVR_FLOW_IEN K_LCK_IEN GPI_IEN KE_IEN
0x02 INT_STAT Interrupt status register N/A
0		 N/A
0		 N/A
0		 CAD_INT OVR_FLOW_INT K_LCK_INT GPI_ INT K_ INT
0x03 KEY_LCK_EC Key lock and event counter register N/A
0		 K_LCK_EN LCK2 LCK1 KLEC3 KLEC2 KLEC1 KLEC0
0x04 KEY_EVENT_A Key event register A KEA7
0		 KEA6
0		 KEA5
0		 KEA4
0		 KEA3
0		 KEA2
0		 KEA1
0		 KEA0
0
0x05 KEY_EVENT_B Key event register B KEB7
0 		KEB6
0		 KEB5
0		 KEB4
0		 KEB3
0		 KEB2
0		 KEB1
0		 KEB0
0
0x06 KEY_EVENT_C Key event register C KEC7
0		 KEC6
0		 KEC5
0		 KEC4
0		 KEC3
0		 KEC2
0		 KEC1
0		 KEC0
0
0x07 KEY_EVENT_D Key event register D KED7
0		 KED6
0		 KED5
0		 KED4
0		 KED3
0		 KED2
0		 KED1
0		 KED0
0
0x08 KEY_EVENT_E Key event register E KEE7
0		 KEE6
0		 KEE5
0		 KEE4
0		 KEE3
0		 KEE2
0		 KEE1
0		 KEE0
0
0x09 KEY_EVENT_F Key event register F KEF7
0		 KEF6
0		 KEF5
0		 KEF4
0		 KEF3
0		 KEF2
0		 KEF1
0		 KEF0
0
0x0A KEY_EVENT_G Key event register G KEG7
0		 KEG6
0		 KEG5
0		 KEG4
0		 KEG3
0		 KEG2
0		 KEG1
0		 KEG0
0
0x0B KEY_EVENT_H Key event register H KEH7
0		 KEH6
0		 KEH5
0		 KEH4
0		 KEH3
0		 KEH2
0		 KEH1
0		 KEH0
0
0x0C KEY_EVENT_I Key event register I KEI7
0		 KEI6
0		 KEI5
0		 KEI4
0		 KEI3
0		 KEI2
0		 KEI1
0		 KEI0
0
0x0D KEY_EVENT_J Key event register J KEJ7
0		 KEJ6
0		 KEJ5
0		 KEJ64
0		 KEJ3
0		 KEJ2
0		 KEJ1
0		 KEJ0
0
0x0E KP_LCK_TIMER Keypad lock 1 to lock 2 timer KL7 KL6 KL5 KL4 KL3 KL2 KL1 KL0
0x0F UNLOCK1 Unlock key 1 UK1_7 UK1_6 UK1_5 UK1_4 UK1_3 UK1_2 UK1_1 UK1_0
0x10 UNLOCK1 Unlock key2 UK2_7 UK2_6 UK2_5 UK2_4 UK2_3 UK2_2 UK2_1 UK2_0
0x11 GPIO_INT_STAT1 GPIO interrupt status R7IS
0		 R6IS
0		 R5IS
0		 R4IS
0		 R3IS
0		 R2IS
0		 R1IS
0		 R0IS
0
0x12 GPIO_INT_STAT2 GPIO interrupt status C7IS
0		 C6IS
0		 C5IS
0		 C4IS
0		 C3IS
0		 C2IS
0		 C1IS
0		 C0IS
0
0x13 GPIO_INT_STAT3 GPIO interrupt status N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9IS
0		 C8IS
0
0x14 GPIO_DAT_STAT1 (read twice to clear) GPIO data status R7DS R6DS R5DS R4DS R3DS R2DS R1DS R0DS
0x15 GPIO_DAT_STAT2 (read twice to clear) GPIO data status C7DS C6DS C5DS C4DS C3DS C2DS C1DS C0DS
0x16 GPIO_DAT_STAT3 (read twice to clear) GPIO data status N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9DS C8DS
0x17 GPIO_DAT_OUT1 GPIO data out R7DO
0		 R6DO
0		 R5DO
0		 R4DO
0		 R3DO
0		 R2DO
0		 R1DO
0		 R0DO
0
0x18 GPIO_DAT_OUT2 GPIO data out C7DO
0		 C6DO
0		 C5DO
0		 C4DO
0		 C3DO
0		 C2DO
0		 C1DO
0		 C0DO
0
0x19 GPIO_DAT_OUT3 GPIO data out N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9DO
0		 C8DO
0
0x1A GPIO_INT_EN1 GPIO interrupt enable R7IE
0		 R6IE
0		 R5IE
0		 R4IE
0		 R3IE
0		 R2IE
0		 R1IE
0		 R0IE
0
0x1B GPIO_INT_EN2 GPIO interrupt enable C7IE
0		 C6IE
0		 C5IE
0		 C4IE
0		 C3IE
0		 C2IE
0		 C1IE
0		 C0IE
0
0x1C GPIO_INT_EN3 GPIO interrupt enable N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9IE
0		 C8IE
0
0x1D KP_GPIO1 Keypad or GPIO selection

0: GPIO

1: KP matrix

 ROW7
0		 ROW6
0		 ROW5
0		 ROW4
0		 ROW3
0		 ROW2
0		 ROW1
0		 ROW0
0
0x1E KP_GPIO2 Keypad or GPIO selection

0: GPIO

1: KP matrix

 COL7
0		 COL6
0		 COL5
0		 COL4
0		 COL3
0		 COL2
0		 COL1
0		 COL0
0
0x1F KP_GPIO3 Keypad or GPIO selection

0: GPIO

1: KP matrix

 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 COL9
0		 COL8
0
0x20 GPI_EM1 GPI event mode 1 ROW7
0		 ROW6
0		 ROW5
0		 ROW4
0		 ROW3
0		 ROW2
0		 ROW1
0		 ROW0
0
0x21 GPI_EM2 GPI event mode 2 COL7
0		 COL6
0		 COL5
0		 COL4
0		 COL3
0		 COL2
0		 COL1
0		 COL0
0
0x22 GPI_EM3 GPI event mode 3 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 COL9
0		 COL8
0
0x23 GPIO_DIR1 GPIO data direction

0: input

1: output

 R7DD
0		 R6DD
0		 R5DD
0		 R4DD
0		 R3DD
0		 R2DD
0		 R1DD
0		 R0DD
0
0x24 GPIO_DIR2 GPIO data direction

0: input

1: output

 C7DD
0		 C6DD
0		 C5DD
0		 C4DD
0		 C3DD
0		 C2DD
0		 C1DD
0		 C0DD
0
0x25 GPIO_DIR3 GPIO data direction

0: input

1: output

 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9DD
0		 C8DD
0
0x26 GPIO_INT_LVL1 GPIO edge/level detect

0: falling/low

1: rising/high

 R7IL
0		 R6IL
0		 R5IL
0		 R4IL
0		 R3IL
0		 R2IL
0		 R1IL
0		 R0IL
0
0x27 GPIO_INT_LVL2 GPIO edge/level detect

0: falling/low

1: rising/high

 C7IL
0		 C6IL
0		 C5IL
0		 C4IL
0		 C3IL
0		 C2IL
0		 C1IL
0		 C0IL
0
0x28 GPIO_INT_LVL3 GPIO edge/level detect

0: falling/low

1: rising/high

 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9IL
0		 C8IL
0
0x29 DEBOUNCE_DIS1 Debounce disable

0: debounce enabled

1: debounce disabled

 R7DD
0		 R6DD
0		 R5DD
0		 R4DD
0		 R3DD
0		 R2DD
0		 R1DD
0		 R0DD
0
0x2A DEBOUNCE_DIS2 Debounce disable

0: debounce enabled

1: debounce disabled

 C7DD
0		 C6DD
0		 C5DD
0		 C4DD
0		 C3DD
0		 C2DD
0		 C1DD
0		 C0DD
0
0x2B DEBOUNCE_DIS3 Debounce disable

0: debounce enabled

1: debounce disabled

 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9DD
0		 C8DD
0
0x2C GPIO_PULL1 GPIO pull-up disable

0: pull-up enabled

1: pull-up disabled

 R7PD
0		 R6PD
0		 R5PD
0		 R4PD
0		 R3PD
0		 R2PD
0		 R1PD
0		 R0PD
0
0x2D GPIO_PULL2 GPIO pull-up disable

0: pull-up enabled

1: pull-up disabled

 C7PD
0		 C6PD
0		 C5PD
0		 C4PD
0		 C3PD
0		 C2PD
0		 C1PD
0		 C0PD
0
0x2E GPIO_PULL3 GPIO pull-up disable

0: pull-up enabled

1: pull-up disabled

 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 N/A
0		 C9PD
0		 C8PD
0
0x2F Reserved