SLLSF83B May   2021  – July 2025 TCAN11623-Q1 , TCAN11625-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings IEC Specification
    4. 5.4 Recomended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Power Supply Characteristics
    7. 5.7 Electrical Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VSUP Pin
      2. 7.3.2  VCCOUT Pin
      3. 7.3.3  VFLT Pin
      4. 7.3.4  VLDO3 Pin
      5. 7.3.5  Digital Inputs and Outputs
      6. 7.3.6  Digital Control and Timing
      7. 7.3.7  VIO Pin
      8. 7.3.8  GND
      9. 7.3.9  INH Pin
      10. 7.3.10 WAKE Pin
      11. 7.3.11 nRST Pin
      12. 7.3.12 CAN Bus Pins
      13. 7.3.13 Local Faults
        1. 7.3.13.1 TXD Dominant Timeout (TXD DTO)
        2. 7.3.13.2 Thermal Shutdown (TSD)
        3. 7.3.13.3 Under/Over Voltage Lockout
        4. 7.3.13.4 Unpowered Devices
        5. 7.3.13.5 Floating Terminals
        6. 7.3.13.6 CAN Bus Short Circuit Current Limiting
        7. 7.3.13.7 Sleep Wake Error Timer
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Mode Description
        1. 7.4.1.1 Normal Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Sleep Mode
          1. 7.4.1.3.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 7.4.1.3.2 Local Wake-Up (LWU) via WAKE Input Terminal
        4. 7.4.1.4 Reset Mode
        5. 7.4.1.5 Fail-safe Mode
      2. 7.4.2 CAN Transceiver
        1. 7.4.2.1 CAN Transceiver Operation
        2. 7.4.2.2 CAN Transceiver Modes
          1. 7.4.2.2.1 CAN Off Mode
          2. 7.4.2.2.2 CAN Autonomous: Inactive and Active
          3. 7.4.2.2.3 CAN Active
        3. 7.4.2.3 Driver and Receiver Function Tables
        4. 7.4.2.4 CAN Bus States
  9. 8 Application Information
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Bus Loading, Length and Number of Nodes
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 CAN Termination
    3. 8.3 Application Curves
    4. 8.4 Power Supply Requirements
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TCAN1162x-Q1 are high-speed controller area network (CAN) system basis chips (SBC) that meet the physical layer requirements of the ISO 11898-2:2016 high-speed CAN specification. The TCAN1162x-Q1 supports both classical CAN and CAN FD networks up to 8 megabits per second (Mbps).

Both the TCAN11623-Q1 and TCAN11625-Q1 support a wide input supply range and integrates some form of an LDO output. The TCAN11625-Q1 has a 5V LDO output (VCCOUT) which supplies the CAN transceiver voltage internally as well as additional current externally. The TCAN11623-Q1 has a 3.3V LDO output (VLDO3), supplied from the 5V LDO, supporting external loads.

The TCAN1162x-Q1 allows for system-level reductions in battery current consumption by selectively enabling the various power supplies that may be present on a system via the INH output pin. This allows an ultra-low-current sleep state where power is gated to all system components except for the TCAN1162x-Q1, while monitoring the CAN bus. When a wake-up event is detected, the TCAN1162x-Q1 initiates system start-up by driving INH high.

This allows an ultra-low-current sleep state in which power is gated to all system components except for the TCAN1162x-Q1, which remains in a low-power state while monitoring the CAN bus. When a wake-up event is detected, the TCAN1162x-Q1 initiates node start-up by driving INH high.

The TCAN1162x-Q1 supports an ultra low-power standby mode where the high-speed transmitter and normal receiver are switched off and a low-power wake-up receiver enables remote wake-up via the ISO 11898-2:2016 defined wake-up pattern (WUP).

The TCAN1162x-Q1 includes internal logic level translation via the VIO terminal to allow for interfacing directly to 1.8V, 2.5V, 3.3V, or 5V controllers. The transceiver includes many protection and diagnostic features including undervoltage detection, over voltage detection, thermal shutdown (TSD), driver dominant timeout (TXD DTO), and bus fault protection up to ±58V.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TCAN11623-Q1
TCAN11625-Q1		 VSON (14) 4.5 mm x 3mm
(1) For all available packages, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TCAN11623-Q1 TCAN11625-Q1 Simplified Schematic Simplified Schematic