at TA = 25°C, VS = 40V (
±20V), VCM = VS / 2, RLOAD = 10kΩ connected to
VS / 2, and CL = 20pF (unless otherwise noted)
Figure 5-1 Offset Voltage
Production Distribution
Figure 5-3 Offset Voltage
vs Temperature
Figure 5-5 Offset Voltage
vs Common-Mode Voltage
Figure 5-7 Offset Voltage
vs Power Supply
Figure 5-9 Open-Loop Gain
and Phase vs Frequency
Figure 5-11 Input Bias
Current vs Common-Mode Voltage
Figure 5-13 Output Voltage
Swing vs Output Current (Sourcing)
Figure 5-15 CMRR vs
Temperature (dB)
Figure 5-17 0.1Hz to 10Hz
Noise
Figure 5-19 Quiescent
Current vs Supply Voltage
Figure 5-21 Open-Loop
Voltage Gain vs Temperature (dB)
Figure 5-23 Small-Signal
Overshoot vs Capacitive Load
Figure 5-25 Phase Margin vs
Capacitive Load
Figure 5-27 Positive
Overload Recovery
| CL = 20pF, G = 1, 10mV step response |
Figure 5-29 Small-Signal
Step Response, Rising
Figure 5-31 Large-Signal
Step Response (Rising)
Figure 5-33 Large-Signal
Step Response
Figure 5-35 Channel
Separation vs Frequency
Figure 5-2 Offset Voltage
Drift Distribution
Figure 5-4 Offset Voltage
vs Common-Mode Voltage
Figure 5-6 Offset Voltage
vs Common-Mode Voltage
Figure 5-8 Open-Loop
Output Impedance vs Frequency
Figure 5-10 Closed-Loop
Gain vs Frequency
Figure 5-12 Input Bias
Current vs Temperature
Figure 5-14 Output Voltage
Swing vs Output Current (Sinking)
Figure 5-16 PSRR vs
Temperature (dB)
Figure 5-18 Input Voltage
Noise Spectral Density vs Frequency
Figure 5-20 Quiescent
Current vs Temperature
Figure 5-22 Short-Circuit
Current vs Temperature
Figure 5-24 Small-Signal
Overshoot vs Capacitive Load
Figure 5-26 No Phase
Reversal
Figure 5-28 Negative
Overload Recovery
| CL = 20pF, G = 1, 10mV step response |
Figure 5-30 Small-Signal
Step Response, Falling
Figure 5-32 Large-Signal
Step Response (Falling)
Figure 5-34 Maximum Output
Voltage vs Frequency
Figure 5-36 EMIRR
(Electromagnetic Interference Rejection Ratio) vs Frequency