High Slew Rate JFET-Input Operational Amplifier
Product details
Parameters
Package | Pins | Size
Technical documentation
= Top documentation for this product selected by TI
| Type | Title | Date | |
|---|---|---|---|
| * | Datasheet | TL08xx FET-Input Operational Amplifiers datasheet (Rev. J) | Nov. 23, 2020 |
| Technical article | What is an op amp? | Jan. 21, 2020 | |
| Technical article | How to lay out a PCB for high-performance, low-side current-sensing designs | Feb. 06, 2018 | |
| Technical article | Low-side current sensing for high-performance cost-sensitive applications | Jan. 22, 2018 | |
| Technical article | Voltage and current sensing in HEV/EV applications | Nov. 22, 2017 | |
| Application note | Compensation Methodology for Error in SK Low-Pass Filter, Caused by Limited GBW | Jul. 18, 2017 | |
| E-book | The Signal e-book: A compendium of blog posts on op amp design topics | Mar. 28, 2017 | |
| Application note | Stability Analysis Of Voltage-Feedback Op Amps, Including Compensation Technique (Rev. A) | Mar. 12, 2001 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
DIP-ADAPTER-EVM
Description
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
Features
- Simplifies prototyping of SMT IC’s
- Supports 6 common package types
- Low Cost
Design tools & simulation
SLOJ069.ZIP (0 KB) - PSpice Model
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
- (...)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| PDIP (P) | 8 | View options |
| SO (PS) | 8 | View options |
| SOIC (D) | 8 | View options |
Ordering & quality
Information included:
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- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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