SLFS043J August   1983  – November 2023 TLC555

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I
    6. 5.6 Electrical Characteristics: VDD = 5 V
    7. 5.7 Electrical Characteristics: VDD = 15 V
    8. 5.8 Timing Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Monostable Operation
      2. 6.3.2 Astable Operation
      3. 6.3.3 Frequency Divider
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Missing-Pulse Detector
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Pulse-Width Modulation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curve
      3. 7.2.3 Pulse-Position Modulation
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
      4. 7.2.4 Sequential Timer
        1. 7.2.4.1 Design Requirements
        2. 7.2.4.2 Detailed Design Procedure
        3. 7.2.4.3 Application Curve
      5. 7.2.5 Designing for Improved ESD Performance
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • PS|8
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Revision History

Changes from Revision I (July 2019) to Revision J (November 2023)

  • Changed ESD protection specification from 2000 V per MIL-STD-883C, method 3015.2, to 1000 V per ANSI/ESDA/JEDEC JS-001, in Features Go
  • Changed Device Information table to Package Information, and changed Body Size (Nom) to Package Size, in Description sectionGo
  • Added ESD Ratings table and HBM, CDM, and MM specifications.Go
  • Changed thermal resistance and characterization parameter values for SOIC and PDIP packages in Thermal Information table.Go
  • Changed reset current (IRESET) test conditions to VRESET = VDD, in Electrical Characteristics: VDD = 5 V and Electrical Characteristics: VDD = 15 V Go
  • Added new reset current (IRESET) typical specification, for test condition VRESET = 0 V, to Electrical Characteristics: VDD = 5 V and Electrical Characteristics: VDD = 15 V Go
  • Changed supply current (IDD) typical value from 170 μA to 180 μA in Electrical Characteristics: VDD = 5 V Go
  • Changed title of Operating Characteristics section to Timing Characteristics and clarified that values are specified by design or characterization.Go
  • Deleted Initial error of timing interval specification in Timing Characteristics Go
  • Added Figure 5-4, Supply Current vs Supply Voltage, Unit 2 Go
  • Changed Figure 5-3, Supply Current vs Supply Voltage, to add "Unit 1" to title, and deleted 0°C and 70°C curvesGo
  • Changed functional block diagram to simplified schematic and moved to Overview Go
  • Updated Functional Block Diagram Go
  • Added guidance for RESET pin pullup resistance and CONT pin voltage range to Monostable Operation Go
  • Added clarity regarding nominal operating frequency and parasitic terms in Astable Operation Go
  • Deleted link to deprecated TLC555 Design Calculator in Astable Operation Go
  • Deleted Figure 17, Equivalent Schematic, and added guidance concerning the RESET pin in Device Functional Modes Go

Changes from Revision H (August 2016) to Revision I (July 2019)

  • Added MIN value for input voltage in Absolute Maximum Ratings Go
  • Added discharge pin in Absolute Maximum Ratings Go
  • Changed MIN supply voltage based on part number in Recommended Operating Conditions Go
  • Added power dissipation capacitance TYP value in Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I Go
  • Added trigger, threshold capacitance TYP value in Electrical Characteristics: VDD = 5 V Go
  • Changed VOH test condition current to –1 mA in Electrical Characteristics: VDD = 5 V Go
  • Added power dissipation capacitance TYP value in Electrical Characteristics: VDD = 5 V Go
  • Added trigger, threshold capacitance TYP value in Electrical Characteristics: VDD = 15 V Go
  • Added power dissipation capacitance TYP value in Electrical Characteristics: VDD = 15 V Go
  • Added Operating Characteristics to the Specifications sectionGo
  • Added Supply Current vs Supply Voltage chart to the Typical Characteristics sectionGo
  • Added Control Impedance vs Temperature chart to the Typical Characteristics sectionGo
  • Added Output Low Resistance vs Temperature chart to the Typical Characteristics sectionGo
  • Added Output High Resistance vs Temperature chart to the Typical Characteristics sectionGo
  • Added Propagation Delay vs Control Voltage chart, VDD = 2 V to the Typical Characteristics sectionGo
  • Added Propagation Delay vs Control Voltage chart, VDD = 5 V to the Typical Characteristics sectionGo
  • Changed trigger high hold time to 1 µs in Monostable Operation Go
  • Changed minimum monostable pulse width to 1 µs in Monostable Operation Go
  • Changed Output Pulse Duration vs Capacitance chart scale down to 0.001 ms in Monostable Operation Go
  • Added more astable frequency formulas to the Astable Operation sectionGo
  • Changed scale on Free-Running Frequency vs Timing Capacitance chart up to 2 MHz in the Astable Operation sectionGo
  • Added CONT pin table note to the Table 6-1, Function Table in the Device Functional Modes Go
  • Changed the application curve chart in the Pulse-Width Modulation sectionGo
  • Changed the application curve charts in the Pulse-Position Modulation sectionGo
  • Added clamping diodes to Sequential Timer Circuit in the Sequential Timer sectionGo
  • Added Designing for Improved ESD Performance section to the Application Information sectionGo

Changes from Revision G (November 2008) to Revision H (August 2016)

  • Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Changed values in the Thermal Information table to align with JEDEC standards.Go
  • Deleted Dissipation Ratings table Go