SLFS043I September   1983  – July 2019 TLC555

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions: D, P, PS, and JG Packages
    2.     Pin Functions: PW and FK
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I
    5. 6.5 Electrical Characteristics: VDD = 5 V
    6. 6.6 Electrical Characteristics: VDD = 15 V
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Monostable Operation
      2. 7.3.2 Astable Operation
      3. 7.3.3 Frequency Divider
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Missing-Pulse Detector
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Pulse-Width Modulation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Pulse-Position Modulation
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 Sequential Timer
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curve
      5. 8.2.5 Designing for Improved ESD Performance
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) TLC555 UNIT
D
(SOIC)
FK
(LCCC)
JG
(CDIP)
P
(PDIP)
PS
(SOP)
PW
(TSSOP)
8 PINS 20 PINS 8 PINS 8 PINS 8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 113 n/a 120 58 120 135 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 58 37 81 48 72 61 °C/W
RθJB Junction-to-board thermal resistance 55 36 110 35 69 77 °C/W
ψJT Junction-to-top characterization parameter 11 n/a 45 26 32 12 °C/W
ψJB Junction-to-board characterization parameter 54 n/a 103 35 68 77 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 4.3 31 n/a n/a n/a °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.