SLOS981 October   2019 TLV6003

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      PIR Motion Detector Buffer
      2.      Offset Voltage vs Temperature
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information – TLV6003
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reverse-Battery Protection
      2. 7.3.2 Common-Mode Input Range
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Drive a Capacitive Load
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

at TA = 25°C, VCC = 2.7 V, 5 V, and 15 V, VICR = VO = VCC/2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC PERFORMANCE
VIO Input offset voltage(1) 390 ±550 µV
TA = –55°C to +125°C 1500
dVIO/dT Offset voltage drift TA = –55°C to +125°C 2 µV/°C
CMRR Common-mode rejection ratio VICR = 0 V to VCC VCC = 2.7 V 63 120 dB
VCC = 2.7 V, 
TA = –40°C to +125°C    
60
VCC = 5 V 66 120
VCC = 5 V, 
TA = –40°C to +125°C
63
VCC = 15 V 76 120
VCC = 15 V, 
TA = –40°C to +125°C
75
AOL Open-loop gain VCC = 2.7 V, 0.2 V < VO <  VCC – 0.2 V, RL = 500 kΩ 112 dB
VCC = 15 V, 0.2 V < VO <  VCC – 0.2 V, RL = 500 kΩ 123 dB
INPUT
IIO Input offset current
 
25 250 pA
TA = –40°C to +125°C 1200
IIB Input bias current
 
100 250 pA
TA = –40°C to +125°C 2000
ri(d) Differential input resistance 300
Ci(c) Common-mode input capacitance f = 100 kHz 3 pF
DYNAMIC PERFORMANCE
UGBW Unity gain bandwidth RL = 500 kΩ, CL = 100 pF 5.5 kHz
SR Slew rate at unity gain VO(pp) = 0.8 V, RL = 500 kΩ, CL = 100 pF 2.5 V/ms
PM Phase margin RL = 500 kΩ, CL = 100 pF 60 °
Gain margin RL = 500 kΩ, CL = 100 pF 15 dB
ts Settling time VCC = 2.7 or 5 V, V(STEP)PP = 1 V,
AV = –1, CL = 100 pF, RL = 100 kΩ
0.1% 1.84 ms
VCC = 15 V, V(STEP)PP = 1 V,
AV = –1, CL = 100 pF, RL = 100 kΩ
0.1% 6.1
0.01% 32
NOISE PERFORMANCE
Vn Equivalent input noise voltage f = 10 Hz 800 nV/√Hz
f = 100 Hz 500
In Equivalent input noise current f = 100 Hz 8 fA/√Hz
OUTPUT
VOL Voltage output swing from the positive rail IOL = 2 µA (sourcing) VCC  – 0.05 VCC  – 0.02 V
TA = –40°C to +125°C VCC  – 0.07
IOL = 50 µA (sourcing) VCC  – 0.08 VCC  – 0.05
TA = –40°C to +125°C VCC  –  0.1
VOH Voltage output swing from the negative rail IOH = 2 µA (sinking) 0.090 0.150
TA = –40°C to +125°C 0.180
IOH = 50 µA (sinking) 0.180 0.230
TA = –40°C to +125°C 0.260
IO Output current VO = 0.5 V from rail ±200 μA
POWER SUPPLY
ICC Supply current VCC = 2.7 V and 5 V 980 1200 nA
TA = –40°C to +125°C 1350
VCC = 15 V 1000 1250
TA = –40°C to +125°C 1400
Reverse supply current VCC = –18 V, VIN = 0 V, VO = open current 50 nA
PSRR Power supply rejection ratio (ΔVCC/ΔVOS) VCC = 2.7 to 5 V, no load 90 100 dB
TA = –40°C to 125°C 85
VCC = 5 to 15 V, no load 100 110
TA = –40°C to 125°C 95
Input offset voltage and offset voltage drift are specified by characterization from TA = –55°C to +125°C.  All other temperature specifications cover the range of TA = –40°C to +125°C, as listed in the test conditions column.