SBVS320C November   2017  – March 2024 TLV755P

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Enable (EN)
      3. 6.3.3 Internal Foldback Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input and Output Capacitor Selection
      2. 7.1.2 Dropout Voltage
      3. 7.1.3 Exiting Dropout
      4. 7.1.4 Reverse Current
      5. 7.1.5 Power Dissipation (PD)
        1. 7.1.5.1 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Current
        2. 7.2.2.2 Thermal Dissipation
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DYD|5
  • DBV|5
  • DQN|4
  • DRV|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TLV755P is an ultra-small, low quiescent current, low-dropout regulator (LDO) that sources 500mA with good line and load transient performance. The TLV755P is optimized for a wide variety of applications by supporting an input voltage range from 1.45V to 5.5V. To minimize cost and solution size, the device is offered in fixed output voltages ranging from 0.6V to 5V to support the lower core voltages of modern microcontrollers (MCUs). Additionally, the TLV755P has a low IQ with enable functionality to minimize standby power. This device features an internal soft-start to lower inrush current, thus providing a controlled voltage to the load and minimizing the input voltage drop during start up. When shutdown, the device actively pulls down the output to quickly discharge the outputs and provide a known start-up state.

The TLV755P is stable with small ceramic output capacitors allowing for a small overall solution size. A precision band-gap and error amplifier provides a typical accuracy of 1%. All device versions have integrated thermal shutdown, current limit, and undervoltage lockout (UVLO). The TLV755P has an internal foldback current limit that helps reduce the thermal dissipation during short-circuit events.

The TLV755 is available in the popular WSON, X2SON, and SOT23-5 (DRV, DQN, and DBV) packages. This device is also available in a thermally enhanced SOT23-5 (DYD) package with a thermal pad that provides significantly reduced thermal resistance compared to a standard SOT23-5 package.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TLV755PDQN (X2SON, 4)1mm × 1mm
DBV (SOT-23, 5)2.9mm × 2.8mm
DYD (SOT-23, 5)2.9mm × 2.8mm
DRV (WSON, 6)2mm × 2mm
(1) For more information, see the Mechanical, Packaging, and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.