SBVS320C November   2017  – March 2024 TLV755P

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Enable (EN)
      3. 6.3.3 Internal Foldback Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input and Output Capacitor Selection
      2. 7.1.2 Dropout Voltage
      3. 7.1.3 Exiting Dropout
      4. 7.1.4 Reverse Current
      5. 7.1.5 Power Dissipation (PD)
        1. 7.1.5.1 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Current
        2. 7.2.2.2 Thermal Dissipation
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DYD|5
  • DBV|5
  • DQN|4
  • DRV|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

GUID-869B579C-936A-40C7-8316-13255E03560E-low.svgFigure 4-1 DQN Package,4-Pin X2SON(Top View)
GUID-20230807-SS0I-H5VR-DLTL-Q080XMF1KMH7-low.svgFigure 4-3 DYD Package,5-Pin SOT-23 With Exposed Thermal Pad(Top View)
GUID-943F6366-491E-4817-906E-3CCD6E535367-low.svgFigure 4-2 DBV Package,5-Pin SOT-23(Top View)
GUID-31E11DF3-EA71-46C5-90D6-88826F8EE270-low.svg
NC = no internal connection.
Figure 4-4 DRV Package,6-Pin WSON With Exposed Thermal Pad(Top View)
Table 4-1 Pin Functions
PINTYPEDESCRIPTION
NAMEDQNDBVDYDDRV
EN3334IEnable pin. Drive EN greater than VHI to turn on the regulator.
Drive EN less than VLO to place the low-dropout regulator (LDO) into shutdown mode.
GND2223—Ground pin.
IN4116IInput pin. A capacitor with a value of 1µF or larger is required from this pin to ground.(1) See the Input and Output Capacitor Selection section for more information.
NC—442, 5—No internal connection.
OUT1551ORegulated output voltage pin. A capacitor with a value of 1µF or larger is required from this pin to ground.(1) See the Input and Output Capacitor Selection section for more information.
Thermal padPad—PadPad—Connect the thermal pad to a large-area ground plane.
The thermal pad is internally connected to GND.
(1) Make sure the nominal input and output capacitance is greater than 0.47µF. Throughout this document the nominal derating on these capacitors is 50%. Make sure the effective capacitance at the pin is greater than 0.47µF.