SNOSDJ6A May   2025  – October 2025 TLV9020L , TLV9022L , TLV9030L , TLV9032L

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions: TLV9020L and TLV9030L Single
    2. 4.2 Pin Configurations:TLV9022L and TLV9032L Dual
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - Single
    5. 5.5 Thermal Information - Dual
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Outputs
        1. 6.4.1.1 TLV902xL Open-Drain Output
        2. 6.4.1.2 TLV903xL Push-Pull Output
      2. 6.4.2 Power-On Reset (POR)
        1. 6.4.2.1 TLV902xL Open Drain Output POR Behavior
        2. 6.4.2.2 TLV903xL Push-Pull Output POR Behavior
      3. 6.4.3 Output Latching
        1. 6.4.3.1 "L1" and "L2" Power-On Options
        2. 6.4.3.2 TLV902xL1 Open-Drain Latch Behavior
        3. 6.4.3.3 TLV902xL2 Open-Drain Latch Behavior
        4. 6.4.3.4 TLV903xL1 Push-Pull Latch Behavior
        5. 6.4.3.5 TLV903xL2 Push-Pull Latch Behavior
        6. 6.4.3.6 Clear (CLR) Input
      4. 6.4.4 Inputs
        1. 6.4.4.1 Rail to Rail Input
        2. 6.4.4.2 Fail-Safe Inputs
        3. 6.4.4.3 Input Protection
        4. 6.4.4.4 Internal Hysteresis
        5. 6.4.4.5 Unused Inputs
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
    2. 7.2 Typical Applications
      1. 7.2.1 Window Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.4.3 Input Protection

The TLV90xxL family incorporates internal ESD protection circuits on all pins. The inputs use a proprietary "snapback" type ESD clamp from each pin to V-. There is no "upper" ESD clamp to V+, which allows the input pins to exceed the supply voltage (V+). During an ESD event, the snapback diodes "short" and go low impedance to V- (like an SCR).

If the inputs are to be connected to a low impedance source, such as a power supply or buffered reference line, TI recommends adding a current-limiting resistor in series with the input to limit any transient currents if the clamps conduct due to transients. The current must be limited 10mA or less. This series resistance can be part of any resistive input dividers or networks.

The ESD diodes can not clamp on the upper voltages. The ESD clamps do not "hold" at a fixed maximum voltage like a Zener diode. If the inputs are connected to a source that can exceed 5.5V, then external clamping is required to prevent exceeding the maximum input voltage.

The input bias current is typically 5pA for input voltages between V+ and V-. Input bias current typically doubles for each 10°C temperature increase.