SLVSK32B December   2025  – July 2026 TLV9041D , TLV9042D

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input and Output
      3. 6.3.3 Decompensated Architecture with Wide Gain-Bandwidth Product
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Overload Recovery
      6. 6.3.6 EMI Rejection
      7. 6.3.7 Electrical Overstress
      8. 6.3.8 Input and ESD Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 TLV904xD Low-Side, Current Sensing Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Noninverting Gain of 5V/V
      3. 7.2.3 250kΩ Gain Transimpedance Design
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4.     Trademarks
    5. 8.4 Electrostatic Discharge Caution
    6. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

TLV9041D TLV9042D TLV9041D DBV Package5-Pin SOT-23Top ViewFigure 4-1 TLV9041D DBV Package
5-Pin SOT-23
Top View
TLV9041D TLV9042D TLV9041 DCK Package5-Pin SC70Top ViewFigure 4-2 TLV9041 DCK Package
5-Pin SC70
Top View
Table 4-1 Pin Functions: TLV9041D
PIN TYPE(1) DESCRIPTION
NAME NO.
SOT-23 SC70
IN– 4 3 I Inverting input
IN+ 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 I Negative (low) supply or ground (for single-supply operation)
V+ 5 5 I Positive (high) supply
(1) I = input, O = output
TLV9041D TLV9042D TLV9042D D and DGK Packages8-Pin SOIC and VSSOPTop ViewFigure 4-3 TLV9042D D and DGK Packages
8-Pin SOIC and VSSOP
Top View
TLV9041D TLV9042D TLV9042D DSG Package8-Pin WSON With Exposed Thermal PadTop View
Connect exposed thermal pad to V–. See Figure 4-4 for more information.
Figure 4-4 TLV9042D DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
Table 4-2 Pin Functions: TLV9042D
PIN TYPE(1) DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
V– 4 I Negative (low) supply or ground (for single-supply operation)
V+ 8 I Positive (high) supply
(1) I = input, O = output