SBOS726A October   2015  – October 2015 TMP107-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital Temperature Output
      2. 8.3.2 Temperature Limits and Alert
        1. 8.3.2.1 ALERT1, ALERT2, R1, and R2 Pins
      3. 8.3.3 SMAART Wire Communication Interface
        1. 8.3.3.1 Communication Protocol
          1. 8.3.3.1.1 Calibration Phase
          2. 8.3.3.1.2 Command and Address Phase
            1. 8.3.3.1.2.1 Global or Individual (G/nI) Bit
            2. 8.3.3.1.2.2 Read/Write (R/nW) Bit
            3. 8.3.3.1.2.3 Command or Address (C/nA) Bit:
          3. 8.3.3.1.3 Register Pointer Phase
          4. 8.3.3.1.4 Data Phase
        2. 8.3.3.2 SMAART Wire Operations
          1. 8.3.3.2.1 Command Operations
            1. 8.3.3.2.1.1 Address Initialize
            2. 8.3.3.2.1.2 Last Device Poll
            3. 8.3.3.2.1.3 Global Software Reset
          2. 8.3.3.2.2 Address Operations
            1. 8.3.3.2.2.1 Individual Write
            2. 8.3.3.2.2.2 Individual Read
            3. 8.3.3.2.2.3 Global Write
            4. 8.3.3.2.2.4 Global Read
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous-Conversion Mode
      2. 8.4.2 Shutdown Mode
      3. 8.4.3 One-Shot Mode
    5. 8.5 Programming
      1. 8.5.1 EEPROM
      2. 8.5.2 EEPROM Operations
        1. 8.5.2.1 EEPROM Unlock
        2. 8.5.2.2 EEPROM Lock
        3. 8.5.2.3 EEPROM Programming
        4. 8.5.2.4 EEPROM Acquire or Read
    6. 8.6 Register Map
      1. 8.6.1 Temperature Register (address = 0h) [reset = 0h]
      2. 8.6.2 Configuration Register (address = 1h) [reset = A000h]
      3. 8.6.3 High Limit 1 Register (address = 2h) [reset = 7FFCh]
      4. 8.6.4 Low Limit 1 Register (address = 3h) [reset = 8000h]
      5. 8.6.5 High Limit 2 Register (address = 4h) [reset = 7FFCh]
      6. 8.6.6 Low Limit 2 Register (address = 5h) [reset = 8000h]
      7. 8.6.7 EEPROM n Register (where n = 1 to 8) (addresses = 6h to Dh) [reset = 0h]
      8. 8.6.8 Die ID Register (address = Fh) [reset = 1107h]
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Connecting Multiple Devices
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Voltage Drop Effect
          2. 9.2.1.2.2 EEPROM Programming Current
          3. 9.2.1.2.3 Power Savings
          4. 9.2.1.2.4 Accuracy
          5. 9.2.1.2.5 Electromagnetic Interference (EMI)
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Connecting ALERT1 and ALERT2 Pins
      3. 9.2.3 ALERT1 and ALERT2 Pins Used as General-Purpose Output (GPO)
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

12.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.3 Trademarks

UART-Compatible, SMAART Wire, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.