SBOS854E March 2018 – August 2021 TMP1075
The thermostat mode bit indicates whether ALERT pin operates in comparator mode (TM = 0) or interrupt mode (TM = 1). ALERT pin mode is controlled by TM (bit 9) of the configuration register. Any write to the TM bit changes the ALERT pin to a none active condition, clears the faults count, and clears the alert interrupt history on the TMP1075 non-N orderables. The ALERT pin can be disabled in both comparator and interrupt modes if both limit registers are set to the rail values TLOW = –128°C and THIGH = +127.9375°C on the TMP1075 non-N orderables.