SCDS416C October   2020  – August 2021 TMUX7211 , TMUX7212 , TMUX7213

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Source or Drain Continuous Current
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 7.7  ±15 V Dual Supply: Switching Characteristics 
    8. 7.8  ±20 V Dual Supply: Electrical Characteristics
    9. 7.9  ±20 V Dual Supply: Switching Characteristics
    10. 7.10 44 V Single Supply: Electrical Characteristics 
    11. 7.11 44 V Single Supply: Switching Characteristics 
    12. 7.12 12 V Single Supply: Electrical Characteristics 
    13. 7.13 12 V Single Supply: Switching Characteristics 
    14. 7.14 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  tON and tOFF Time
    5. 8.5  tON (VDD) Time
    6. 8.6  Propagation Delay
    7. 8.7  Charge Injection
    8. 8.8  Off Isolation
    9. 8.9  Channel-to-Channel Crosstalk
    10. 8.10 Bandwidth
    11. 8.11 THD + Noise
    12. 8.12 Power Supply Rejection Ratio (PSRR)
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 9.3.5 Fail-Safe Logic
      6. 9.3.6 Latch-Up Immune
      7. 9.3.7 Ultra-Low Charge Injection
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN MAX UNIT
VDD – VSS Supply voltage 48 V
VDD –0.5 48 V
VSS –48 0.5 V
VSEL or VEN Logic control input pin voltage (SELx) –0.5 48 V
ISEL or IEN Logic control input pin current (SELx) –30 30 mA
VS or VD Source or drain voltage (Sx, Dx) VSS–0.5 VDD+0.5 V
IIK  Diode clamp current(3) –30 30 mA
IS or ID (CONT) Source or drain continuous current (Sx, Dx) IDC + 10 %(4) mA
TA Ambient temperature –55 150 °C
Tstg Storage temperature –65 150 °C
TJ Junction temperature 150 °C
Ptot Total power dissipation (QFN)(5) 1650 mW
Total power dissipation (TSSOP)(5) 700 mW
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
Pins are diode-clamped to the power-supply rails. Over voltage signals must be voltage and current limited to maximum ratings.
Refer to Source or Drain Continuous Current table for IDC specifications.
For QFN package: Ptot derates linearly above TA = 70°C by 24.2mW/°C.
For TSSOP package: Ptot = 700 mW (max) and derates linearly above TA = 70°C by 10.7mW/°C.