SLLSEG0F March   2013  – September 2017 TPD4E001-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—AEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 ESD Ratings—ISO Specification
    5. 6.5 Recommended Operating Conditions
    6. 6.6 Thermal Information
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 AEC-Q100 Qualified
      2. 7.3.2 IEC 61000-4-2 Level 4 ESD Protection
      3. 7.3.3 IEC 61000-4-5 Surge Protection
      4. 7.3.4 Low 1.5-pF Input Capacitance
      5. 7.3.5 Low 10-nA (Maximum) Leakage Current
      6. 7.3.6 0.9-V to 5.5-V Supply Voltage Range
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range on IO1 Through IO4
        2. 8.2.2.2 Voltage Range on VCC
        3. 8.2.2.3 Bandwidth on IO1 Through IO4
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DBV Package
6-Pin SOT-23
Top View
TPD4E001-Q1 po_SLLSEG0.gif

Pin Functions

PIN TYPE DESCRIPTION
NAME NO.
GND 2 GND Ground
IO1 1 I/O ESD-protected channel
IO2 3
IO3 4
IO4 6
VCC 5 I Power-supply input. Bypass VCC to GND with a 0.1-μF ceramic capacitor