SLLS907E August   2008  – August 2014 TPD4F003 , TPD6F003 , TPD8F003

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
      1. 6.6.1 IEC Clamping Waveforms (clamp voltage measured both at Ch_Out and Ch_In)
      2. 6.6.2 Channel-to-Channel Crosstalk
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Four-, Six-, and Eight-Channel EMI Filtering for Data Ports
      2. 7.3.2 -3 dB Bandwidth of 200 MHz
      3. 7.3.3 Greater Than 25 dB Attenuation at 1 GHz
      4. 7.3.4 Robust ESD Protection Exceeds IEC 61000-4-2
      5. 7.3.5 Pi-Style (C-R-C) Filter Configuration
      6. 7.3.6 Low 10-nA Leakage Current
      7. 7.3.7 Easy Flow-Through Routing
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range on All Protected Lines
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQD|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DQD PACKAGE
(TOP VIEW)
po_lls907.gif

Pin Functions - TPD4F003

PIN I/O DESCRIPTION
NAME No.
ChX_In 1, 2, 3, 4 IO ESD-protected channel, connected to corresponding ChX_Out
ChX_Out 5, 6, 7, 8 IO ESD-protected channel, connected to corresponding ChX_In
GND GND G Ground

Pin Functions - TPD6F003

PIN I/O Description
Name No.
ChX_In 1, 2, 3, 4, 5, 6 IO ESD-protected channel, connected to corresponding ChX_Out
ChX_Out 7, 8, 9, 10, 11, 12 IO ESD-protected channel, connected to corresponding ChX_In
GND GND G Ground

Pin Functions - TPD8F003

PIN I/O Description
Name No.
ChX_In 1, 2, 3, 4, 5, 6, 7, 8 IO ESD-protected channel, connected to corresponding ChX_Out
ChX_Out 9, 10, 11, 12, 13, 14, 15, 16 IO ESD-protected channel, connected to corresponding ChX_In
GND GND G Ground