SLIS171 December 2015 TPIC2030
PRODUCTION DATA.
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| + 5 V supply voltage P5V, P5V_SW, P5V_SPM | 6 | V | ||
| Voltage | 7 | V | ||
| Spindle output current | 1.0 | A | ||
| Spindle output peak current (PW ≦ 2 ms, Duty ≦ 30%) | 2.5 | A | ||
| Current | 0.8 | A | ||
| Focus/tilt/tracking driver output peak current | 1.5 | A | ||
| Current | 0.8 | A | ||
| Input/output voltage | –0.3 | VCC + 0.3 V | V | |
| Power dissipation | 1438 | mW | ||
| Operating temperature | –20 | 75 | °C | |
| Tstg | Storage temperature | –50 | 150 | °C |
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 | |||
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| P5V | Operating supply voltage(Apply for P5V) | 4.5 | 5.0 | 5.5 | V |
| VSIOV | SIOV voltage | 3.0 | 3.3 | 3.6 | V |
| VSIFH | XMUTE, SIMO, SSZ, SCLK pin H level input voltage range | 2.2 | SIOV + 0.2 | V | |
| VSIFL | XMUTE, SIMO, SSZ, SCLK pin L level input voltage range | –0.2 | 0.8 | V | |
| VIHB | SWR_VSEL1, SWR_VSEL2 pin H level input voltage | 2.2 | P5V + 0.1 | V | |
| VILB | SWR_VSEL1, SWR_VSEL2 pin L level input voltage range | –0.1 | 0.8 | V | |
| V disRFB | REGFB input level for DC-DC converter disable | P5V – 0.1 | P5V | P5V + 0.1 | V |
| ISPMOA | Spindle output average current (U, V, W total) | 700 | mA | ||
| ISPMO | Spindle output current | 700 | mA | ||
| ISLDOA | Sled output average current | 400 | mA | ||
| ILd1Px | DC-DC converter load current 1.x V | 700 | mA | ||
| ILd3P3 | DC-DC converter load current 3.3 V | 500 | mA | ||
| IACTOA | Focus / tracking / tilt / loading output average current | 400 | mA | ||
| ILEDOA | LED output average current | 50 | mA | ||
| ICSWOA | CSWO output average current | 200 | mA | ||
| Fck | SCLK frequency | 30 | 33.8688 | 35 | MHz |
| TO | Operating | –20 | 25 | 75 | ℃ |
| THERMAL METRIC(1) | TPIC2030 | UNIT | |
|---|---|---|---|
| DBT (TSSOP) | |||
| TBD PINS | |||
| RθJA | Junction-to-ambient thermal resistance (2) | 71.9 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 19.1 | °C/W |
| RθJB | Junction-to-board thermal resistance | 34.3 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.5 | °C/W |
| ψJB | Junction-to-board characterization parameter | 33.9 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| ISTBY | Standby supply current | REGFB = P5V, XSLEEP = L | 0.2 | mA | ||
| VCV3 | CV3P3 output voltage | Iload = 25 mA, REGFB < 3.7 V | 2.97 | 3.3 | 3.63 | V |
| RXM | XMUTE pulldown resistor | 80 | 200 | 320 | kΩ | |
| RSW1 | SWR_VSEL1 pulldown resistor | 80 | 200 | 320 | kΩ | |
| RSW2 | SWR_VSEL2 pulldown resistor | 80 | 200 | 320 | kΩ | |
| RXRST | XRESET pullup resistor | 13.2 | 33 | 52.8 | kΩ | |
| VXRSTL | XRESET low level output voltage | SIOV = 3.3 V, IOL = –100 µA | 0.3 | V | ||
| TPOR | Power on reset delay | 15 | 20 | 25 | ms | |
| RXFG | XFG output resistor | 100 | 200 | 300 | Ω | |
| VXFGH | XFG high level output voltage | SIOV = 3.3 V, XSLEEP = 1, IOH = 100 µA |
SIOV – 0.3 | V | ||
| VXFGL | XFG low level output voltage | SIOV = 3.3 V, XSLEEP = 1, IOL = –100 µA |
0.3 | V | ||
| RGPO | GPOUT output resistor | 100 | 200 | 300 | Ω | |
| VGPOH | GPOUT high level output voltage | SIOV = 3.3 V, XSLEEP = 1, GPOUT_ENA = 1, GPOUT_HL = 1, IOH = 100 µA |
SIOV – 0.3 | V | ||
| VGPOL | GPOUT low level output voltage | SIOV = 3.3 V, XSLEEP = 1, GPOUT_ENA = 1,GPOUT_HL = 0, IOH = 100 µA |
0.3 | V | ||
| tTSD | Thermal protect on temperature | Design specified value | 135 | 150 | 165 | ºC |
| hytTSD | Thermal protect hys temperature | 5 | 15 | 25 | ºC | |
| Vonvcc | P5V Reset on voltage | 3.4 | 3.65 | 3.9 | V | |
| Voffvcc | P5V Reset off voltage | 3.6 | 3.85 | 4.1 | V | |
| VonCV3 | CV3P3 reset on voltage | 2.4 | 2.6 | 2.8 | V | |
| VoffCV3 | CV3P3 reset off voltage | 2.5 | 2.7 | 2.9 | V | |
| VonSIO | SIOV reset on voltage | 2.3 | 2.5 | 2.7 | V | |
| VoffSIO | SIOV reset off voltage | 2.4 | 2.6 | 2.8 | V | |
| VovpspmOn | OVP detection voltage (spindle) (1) | 6.0 | 6.2 | 6.5 | V | |
| VovpspmOff | OVP release voltage (spindle) (1) | 5.8 | 6.0 | 6.3 | V | |
| VovpSpmHys | OVP voltage hysteresis (spindle) (1) | 110 | 230 | 350 | mV | |
| VovpOn | OVP detection voltage (except spindle) (1) | 6.3 | 6.5 | 6.8 | V | |
| VovpOff | OVP release voltage (except spindle) (1) | 6.1 | 6.3 | 6.6 | V | |
| VovpHys | OVP voltage hysteresis (except Spindle) (1) | 120 | 240 | 360 | mV | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| FCHGP | Frequency | XSLEEP = 1 | 132.6 | 156 | 179.4 | kHz |
| VCHGP | Output Voltage | Ccp1 = Ccp3 = 0.1 µF IO = –1 mA |
7.76 | 9.7 | 11.64 | V |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Rds1pxH | High Side FET RDSON | REGFB = 0 V REGOUT + 100 mA, +300 mA | 0.42 | 0.62 | Ω | |
| Rds1pxL | Low Side FET RDSON | REGFB = 1.2 V REGOUT – 100 mA, –300 mA | 0.2 | 0.4 | Ω | |
| VO1p0 | Output Voltage(1p0V) | [SWR_VSEL2, SWR_VSEL1] = 10 | 0.95 | 1.0 | 1.05 | V |
| VO1p2 | Output Voltage(1p2V) | [SWR_VSEL2, SWR_VSEL1] = 01 | 1.14 | 1.2 | 1.26 | V |
| VO1p5 | Output Voltage(1p5V) | [SWR_VSEL2, SWR_VSEL1] = 11 | 1.425 | 1.5 | 1.575 | V |
| VO3p3 | Output Voltage(3p3V) | [SWR_VSEL2, SWR_VSEL1] = 00 | 3.13 | 3.3 | 3.47 | V |
| Tdly1p2 | Soft start time | [SWR_VSEL2, SWR_VSEL1] = 01 From P5V reset off to target 90% |
0.66 | 0.82 | 0.98 | ms |
| RdsO1p2 | Output Pull down transistor Rdson | REGFB = 1 V (at DC-DC enable) | 616 | 880 | 1144 | Ω |
| Fsw1px | Switching frequency | 2.125 | 2.5 | 2.875 | MHz | |
| Vrston1px | Reset on voltage threshold level | 75% | 80% | 85% | ||
| Vrstoff1px | Reset off voltage threshold level | 85% | 90% | 95% | ||
| VrstHys | Reset off voltage threshold Hys | 5% | 10% | 15% | ||
| PSRRDCDC | PSRR ratio | P5V_SW = 5 V + 200 mVpp, IO = 200 mA, F ≈ 100 kHz |
26 | – | – | dB |
| IovcDCDC | Overcurrent protective level (1)(2) | [SWR_VSEL2, SWR_VSEL1] ≠ 00 SWR_BSTAUTON = 0 |
1.3 | 1.85 | 2.4 | A |
| [SWR_VSEL2, SWR_VSEL1] = 00 SWR_BSTAUTON = 0 |
0.65 | 1.15 | 1.65 | A | ||
| TMskovctpic | mask time of over current protection (1) | 0.7 | 1.0 | 1.3 | ms | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RttlSPM | Total output resistance High side + low side (IncldRcs) |
IOUT = 0.5 A | 0.37 | 0.7 | Ω | |
| ResSPM | Resolution | 12 | bit | |||
| GnSPM | Gain | Magnification to 1.0 input | 5.2 | 6.0 | 6.8 | times |
| WidDZSPM | Spindle dead band | Forward | 12h | 52h | 92h | |
| Reverse | –92h | –52h | –12h | |||
| WidDZSPMLS | Spindle dead band (LS mode) | –40h | 0h | 40h | ||
| SPMClim | Current limit | SPM_RCOM_SEL = 00 | 801 | 890 | 979 | mA |
| SPM_RCOM_SEL = 01 | 882 | 980 | 1078 | mA | ||
| SPM_RCOM_SEL = 10 | 652 | 725 | 798 | mA | ||
| SPM_RCOM_SEL = 11 | 705 | 784 | 863 | mA | ||
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RttlSLD | Total output resistance High side + low side |
IO = 0.5 A | 0.8 | 1.2 | Ω | |
| ResSLD | Resolution | 10 | bit | |||
| WidDZSLD | input Dead band | Forward | 2h | 1Fh | 60h | |
| Reverse | –60h | –1Fh | –2h | |||
| GnSLD | Sled current gain | P5V = 5 V RL = 10 Ω, 2.2 mH VSLED = 7FFh |
380 | 440 | 500 | mA |
| VthEdetSLD | END_DET BEMF threshold voltage | SLEDENDTH<1:0> = 00 | 26 | 46 | 66 | mV |
| SLEDENDTH<1:0> = 01 | 42 | 82 | 122 | mV | ||
| SLEDENDTH<1:0> = 11 | 9 | 22 | 35 | mV | ||
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RttlAct | Total output resistance High side + low side |
IO = 0.5 A | 0.7 | 1.1 | Ω | |
| ResACT | Resolution | 12 | bit | |||
| VOfstACT | Each channel output offset voltage | DAC_code = 000h | –30 | 0 | 30 | mV |
| VOfstDACT | Output offset voltage focus and tilt | DIFF_TLT = 1 | –50 | 0 | 50 | mV |
| GnDAct | Difference gain focus and tilt | DIFF_TLT = 1 | –1 | 0 | 1 | db |
| GnAct | Gain | magnification to 1.0 input | 5.2 | 6 | 6.8 | times |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RttlLOD | Total output resistance High side + low side |
IO = 0.5 A | 0.7 | 1.1 | Ω | |
| ResLOD | Resolution | 12 | bit | |||
| GnLOD | Gain | Magnification to 1.0 input | 5.2 | 6 | 6.8 | times |
| WidDZLOD | Dead band | Forward | 20h | |||
| Reverse | –21h | |||||
| TocpLOD | Output 100% limit time | LOAD_05CH = 0 | 0.64 | 0.8 | 0.96 | s |
| IocpLOD | Overcurrent protective Level | LOAD_05CH = 1 at Load_OCP_IUP = 0 | 120 | 240 | 360 | mA |
| LOAD_05CH = 1 at Load_OCP_IUP = 1 | 215 | 430 | 645 | mA | ||
| DlyocpLOD | Overcurrent protection delay time | LOAD_05CH = 1 | 0.64 | 0.8 | 0.96 | s |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RdsCSW | Rds(on) | IO = 0.2 A | 200 | 500 | mΩ | |
| IlmtCSW | Current limit threshold level | 0.25 | 0.5 | 0.75 | A | |
| ThlCSW | Protection hold time | 1.47 | 1.6 | 2.0 | ms | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RdsLED | Rds(on) | IO = 10 mA | 4.4 | 10 | Ω | |
| IlmtLED | Current limit threshold level | P5V = 5 V | 0.055 | 0.1 | 0.145 | A |
| ThlLED | Protection hold time | 0.35 | 0.4 | 0.66 | ms | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| ResTEMP | Resolution | 7 | bit | |||
| TEMPrng | Temperature range | CHIPTEMP[6:0] = 00 | 8 | 15 | 22 | °C |
| CHIPTEMP[6:0] = 7Fh | 155 | 165 | 175 | |||
| FTEMP | Update cycle | 8 | 10 | 12 | KHz | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| TintACTTEMP | Update cycle | 21 | 26 | 31 | ms | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SOMI | High-level output voltage, VOH | IOH = 1 mA | 80 % SIOV |
V | ||
| SOMI | Low-level output voltage, VOL | IOL = 1 mA | 20% SIOV |
V | ||
| SIMO | High-level input voltage, VIH | 70% SIOV |
V | |||
| SIMO | Low level input voltage, VIL | 20% SIOV |
V | |||
| SIMO | Input rise/fall time | 10% → 90% SIOV | 3.5 | ns | ||
| SOMI | Output rise/fall time(1) | Cload = 30 pF,10% 90% SIOV | 10 | ns | ||
| SCLK | Internal pulldown resistance | 80 | 200 | 320 | kΩ | |
| SSZ | Internal pullup resistance | 80 | 200 | 320 | kΩ | |
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Fck | SCLK clock frequency | SIOV = 3.3 V | 35 | MHz | ||
| tckl | SCLK low time | 11 | ns | |||
| tckh | SCLK high time | 11 | ns | |||
| tsens | SSZ setup time | 7 | ns | |||
| tsenh | SSZ hold time | 7 | ns | |||
| tsl | SSZ disable high time | 11 | ns | |||
| tds | SIMO setup time (Write) | 7 | ns | |||
| tdh | SIMO hold time (Write) | 7 | ns | |||
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Fck | SCLK clock frequency | SIOV = 3.3 V | 35 | MHz | ||
| tckl | SCLK low time | 11 | ns | |||
| tckh | SCLK high time | 11 | ns | |||
| tsens | SSZ setup time | 7 | ns | |||
| tsenh | SSZ hold time | 7 | ns | |||
| tsl | SSZ disable high time | 11 | ns | |||
| tds | SIMO setup time (Write) | 7 | ns | |||
| tdh | SIMO hold time (Write) | 7 | ns | |||
| trdly | SOMI delay time (Read) | CLOAD = 10 pF, SIOV = 3.3 V | 2 | 9 | ns | |
| tsendl | SOMI hold time (Read) | CLOAD = 10 pF, SIOV = 3.3 V | 2 | 9 | ns | |
| trls | SOMI release time (Read) | CLOAD = 10 pF, SIOV = 3.3 V From SSZ rise to SOMI HIZ |
0 | 9 | ns | |
Figure 1. Serial Port Write Timing
Figure 2. Serial Port Read Timings