SLVSFI1A July   2021  – December 2021 TPS1HC100-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. 5.1 Recommended Connections for Unused Pins
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Accurate Current Sense
      2. 8.3.2 Programmable Current Limit
        1. 8.3.2.1 Capacitive Charging
      3. 8.3.3 Inductive-Load Switching-Off Clamp
      4. 8.3.4 Full Protections and Diagnostics
        1. 8.3.4.1  Short-Circuit and Overload Protection
        2. 8.3.4.2  Open-Load and Short-to-Battery Detection
        3. 8.3.4.3  Short-to-Battery Detection
        4. 8.3.4.4  Reverse-Polarity and Battery Protection
        5. 8.3.4.5  Latch-Off Mode
        6. 8.3.4.6  Thermal Protection Behavior
        7. 8.3.4.7  UVLO Protection
        8. 8.3.4.8  Loss of GND Protection
        9. 8.3.4.9  Loss of Power Supply Protection
        10. 8.3.4.10 Reverse Current Protection
        11. 8.3.4.11 Protection for MCU I/Os
      5. 8.3.5 Diagnostic Enable Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Working Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Dynamically Changing Current Limit
        2. 9.2.2.2 AEC Q100-012 Test Grade A Certification
        3. 9.2.2.3 EMC Transient Disturbances Test
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Without a GND Network
      2. 11.2.2 With a GND Network
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Switching Characteristics

VBB = 13.5 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tDR Channel Turnon delay time (from Standby) VBB = 13.5 V, RL = 10 Ω 50% of EN to 10% of VOUT 10 40 55 µs
tDR Channel Turnon delay time (from Active) VBB = 13.5 V, RL = 10Ω 50% of EN to 10% of VOUT 10 30 45 µs
tDF Channel Turnoff delay time VBB = 13.5 V, RL = 10 Ω 50% of EN to 90% of VOUT 10 30 45 µs
SRR VOUT rising slew rate VBB = 13.5 V, 20% to 80% of VOUT,
RL = 10 Ω		 0.1 0.25 0.5 V/µs
SRF VOUT falling slew rate VBB = 13.5 V, 80% to 20% of VOUT,
RL = 10 Ω		 0.1 0.25 0.5 V/µs
fmax Maximum PWM frequency(1) 0.4 2 kHz
tON Channel Turnon time VBB = 13.5 V, RL = 10 Ω  50% of EN to 80% of VOUT 30 70 145 µs
tOFF Channel Turnoff time VBB = 13.5 V, RL = 10Ω  50% of EN to 20% of VOUT 39 70 145 µs
tON - tOFF  Turnon and off matching 1ms enable pulse VBB = 13.5 V, RL = 10 Ω –30 30 µs
200-µs enable pulse, VBB = 13.5 V, RL = 10 Ω,
 		 –30 30 µs
ΔPWM  PWM accuracy - average load current 200-µs enable pulse (1ms period), VBB = 13.5 V, RL = 10 Ω 
 		 –25 25 %
≤500Hz, 50% Duty cycle VBB = 13.5 V, RL = 10 Ω 
 		 –10 10 %
EON Switching energy losses during turnon VBB = 13.5 V, RL = 10 Ω 0.5 mJ
EOFF Switching energy losses during turnoff VBB = 13.5 V, RL = 10 Ω 0.5 mJ