SLVSCE9D June   2014  – October  2017 TPS25942A , TPS25942L , TPS25944A , TPS25944L

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Enable and Adjusting Undervoltage Lockout
      2. 9.3.2  Overvoltage Protection (OVP)
      3. 9.3.3  Hot Plug-In and In-Rush Current Control
      4. 9.3.4  Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
        3. 9.3.4.3 Start-Up With Short on Output
        4. 9.3.4.4 Constant Current Limit Behavior During Overcurrent Faults
      5. 9.3.5  Reverse Current Protection
      6. 9.3.6  FAULT Response
      7. 9.3.7  Current Monitoring
      8. 9.3.8  Power Good Comparator
      9. 9.3.9  IN, OUT and GND Pins
      10. 9.3.10 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Diode Mode
      2. 9.4.2 Shutdown Control
      3. 9.4.3 Operational Differences Between the TPS25942 and TPS25944
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.5.1 Case1: Start-Up Without Load: Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance C(OUT) and Load Draws Current During Start-Up
        6. 10.2.2.6 Programing the Power Good Set Point
        7. 10.2.2.7 Support Component Selections—R6, R7 and CIN
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Active ORing (Auto-Power Multiplexer) Operation
        1. 10.3.1.1 N+1 Power Supply Operation
        2. 10.3.1.2 Priority Power MUX Operation
        3. 10.3.1.3 Priority MUXing With Almost Equal Rails (VIN1 ~ VIN2)
        4. 10.3.1.4 Reverse Polarity Protection
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Community Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Priority Power MUX Operation

Applications having two energy sources such as PCIe cards, Tablets and Portable battery powered equipment require preference of one source to another. For example, mains power (wall-adapter) has the priority over the internal back-up power or auxiliary power. These applications demand for switch over from mains power to back-up power only when main input voltage falls below a user defined threshold. The devices provide a simple solution for priority power multiplexing needs.

Figure 79 shows a typical priority power multiplexing implementation using devices. When primary power IN1 is present, the device in IN1 path powers the OUT bus irrespective of whether auxiliary power IN2 is greater than or less than IN1. Once the voltage on the IN1 rail falls below the user-defined threshold, the device IN1 issues a signal to switch over to auxiliary power IN2. The transition happens seamlessly in less than 125 µs, with minimal voltage droop on the bus. The voltage droop during transition is a function of load current and bus capacitance (see Equation 36).

Equation 36. TPS25942A TPS25942L TPS25944A TPS25944L eq_34_slvsce9.gif

where

  • V(droop) in Volts, I(Load) is load current in Ampere, C(BUS) is bus capacitance in µF

When the main voltage supply (IN1) is not present or during brown-out conditions, the device in auxiliary supply rail (IN2) provides power to the output. When IN1 recovers, the device connected to IN1 is turned on at defined slew rate and the device in IN2 path is turned off, allowing a seamless transition from auxiliary to the main voltage supply with minimal droop and with no shoot-through current.

Priority power multiplexing can be done either between two similar rails (such as 12 V Primary to 12 V Aux, 3.3 V Primary to 3.3 V Aux) or between dissimilar rails (such as 12 V Primary to 5 V Aux or 3.3 V Aux; or vice versa).

TPS25942A TPS25942L TPS25944A TPS25944L Power_Multiplexing_slvsce9.gif
CIN: Optional and only for noise suppression.
Master controls the slave using priority signal for switch over to Auxiliary power.
Figure 79. Priority Power Multiplexing Implementation

Figure 80 and Figure 81 show typical switch-over waveforms of Priority Muxing implementation using the TPS25942 or TPS25944 for 11.5 V Primary and 14.5 V Auxiliary Bus.

Figure 82 and Figure 83 show typical switch-over waveforms of Priority Muxing implementation using the TPS25942 or TPS25944 for 12 V Primary and 3.3 V Auxiliary Bus.

TPS25942A TPS25942L TPS25944A TPS25944L 12VMain_14.5Aux_5_6Ohm_Mains_Hotswap_PriorityMux.png
V(IN1) = 11.5 V R(ILIM1) = 24.6 kΩ, C(OUT) = 150 µF
V(IN2) = 14.5 V R(ILIM2) = 33.2 kΩ C(dVdT) = 1.2 nF
RL = 5.6 Ω R(IMON) = 16.2 kΩ V(UVLO-High) = 10.8 V
Figure 80. IN1 Power Recovery: Change Over from Auxiliary IN2 to Primary Power IN1
TPS25942A TPS25942L TPS25944A TPS25944L 12Main_3.3VAux_5_6Ohm_Mains_sink_45ohm_Hotswap.png
V(IN1) = 12 V R(ILIM1) = 24.6 kΩ C(OUT) = 150 µF
V(IN2) = 3.3 V R(ILIM2) = 33.2 kΩ C(dVdT) = 1.2 nF
RLoad = 5.6 Ω R(IMON) = 16.2 kΩ V(UVLO-High) = 10.8 V
Figure 82. IN1 Power Recovery: Change Over from Auxiliary IN2 to Main Power IN1
TPS25942A TPS25942L TPS25944A TPS25944L 12Main_14.5VAux_5_6Ohm_Mains_sink_45ohm_Slow_Brownout_Priority.png
V(IN1) = 11.5 V R(ILIM1) = 24.6 kΩ C(OUT) = 150 µF
V(IN2) = 14.5 V R(ILIM2) = 33.2 kΩ C(dVdT) = 1.2 nF
RL = 5.6 Ω R(IMON) = 16.2 kΩ V(UVLO-Low) = 10.2 V
Figure 81. IN1 Brownout Condition: Change Over from Main IN1 to Auxiliary Power IN2
TPS25942A TPS25942L TPS25944A TPS25944L 12Main_3.3VAux_5_6Ohm_Mains_sink_45ohm_Brownout.png
V(IN1) = 12 V R(ILIM1) = 24.6 kΩ C(OUT) = 150 µF
V(IN2) = 3.3 V R(ILIM2) = 33.2 kΩ C(dVdT) = 1.2 nF
RL = 5.6 Ω R(IMON) = 16.2 kΩ V(UVLO-Low) = 10.2 V
Figure 83. IN1 Brownout Condition: Change Over from Main IN1 to Auxiliary Power IN2