SNVSCH9 April   2025 TPS388C0-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
      1. 7.3.1 TPS388C0x-Q1 Power ON
      2. 7.3.2 Built-In Self Test and Configuration Load
        1. 7.3.2.1 Notes on BIST Execution
      3. 7.3.3 General Monitoring
        1. 7.3.3.1 ACTIVE Monitoring
    4. 7.4 Feature Description
      1. 7.4.1 VDD
      2. 7.4.2 Maskable Interrupt (AMSK)
      3. 7.4.3 MON
      4. 7.4.4 NRST
      5. 7.4.5 NIRQ
      6. 7.4.6 I2C
      7. 7.4.7 Packet Error Checking (PEC)
      8. 7.4.8 Window Watchdog
      9. 7.4.9 Window Watchdog Timer
    5. 7.5 Register Maps
      1. 7.5.1 Registers Overview
        1. 7.5.1.1 BANK0 Registers
        2. 7.5.1.2 BANK1 Registers
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Automotive Multichannel Sequencer and Monitor
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Documentation Support
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

Figure 5-1 RTE Package
16-Pin WQFN
TPS388C06-Q1 Top View
Figure 5-2 RTE Package
16-Pin WQFN
TPS388C04-Q1 Top View
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NO. TPS388C06-Q1

TPS388C04-Q1

NAME

NAME

1 MON3

MON3

I Voltage monitor channel 3
2

MON6

RS_3

I MON6:Voltage monitor channel 6

RS_3: Remote sense for voltage monitor channel 3

3 MON4

MON4

I Voltage monitor channel 4
4

MON5

MON5

I Voltage monitor channel 5
5

WDO

WDO

O

Open drain Watchdog Error output

6 GND

GND

- Power ground
7

WDI

WDI

I

Watchdog input

8 VDD

VDD

- Power supply rail
9 NRST

NRST

I/O Open drain Reset pin
10 MON2

MON2

I Voltage monitor channel 2
11

MON7

RS_2

I MON7: Voltage monitor channel 7

RS_2: Remote sense for voltage monitor channel 2

12 WDE

WDE

I Watchdog enable
13 NIRQ

NIRQ

O Active-low open-drain interrupt output
14 ADDR

ADDR

I I2C address select pin
15 SDA

SDA

I/O I2C data pin
16 SCL

SCL

I I2C clock pin
17 GND

GND

- Exposed power ground pad