SLVS753C February   2007  – November 2016 TPS40180

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Sensing and Overcurrent Detection
      2. 7.3.2 Hiccup Fault Recovery
      3. 7.3.3 Selecting Current Sense Network Components
      4. 7.3.4 PGOOD Functionality
      5. 7.3.5 Output Overvoltage and Undervoltage Protection
      6. 7.3.6 Overtemperature Protection
      7. 7.3.7 eTRIM™
      8. 7.3.8 Connections Between Controllers for Stacking
      9. 7.3.9 VSH Line in the Multiphase
    4. 7.4 Device Functional Modes
      1. 7.4.1 Tracking
    5. 7.5 Programming
      1. 7.5.1 Programming the Operating Frequency
      2. 7.5.2 Programming the Soft-Start Time
      3. 7.5.3 Using the Device for Clock Master/Slave Operation
      4. 7.5.4 Using the TPS40180 for Voltage Control Loop Master or Slave Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Single Output Synchronous Buck Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 MOSFET Selection
          5. 8.2.1.2.5 Peripheral Component Design
            1. 8.2.1.2.5.1  Switching Frequency Setting (RT)
            2. 8.2.1.2.5.2  Output Voltage Setting (FB)
            3. 8.2.1.2.5.3  Current Sensing Network Design (CS+, CS-)
            4. 8.2.1.2.5.4  Overcurrent Protection (ILIM)
            5. 8.2.1.2.5.5  VREG (PVCC)
            6. 8.2.1.2.5.6  BP5
            7. 8.2.1.2.5.7  Phase Select (PSEL)
            8. 8.2.1.2.5.8  VSHARE (VSH)
            9. 8.2.1.2.5.9  Powergood (PGOOD)
            10. 8.2.1.2.5.10 Undervoltage Lockout (UVLO)
            11. 8.2.1.2.5.11 Clock Synchronization (CLKIO)
            12. 8.2.1.2.5.12 Bootstrap Capacitor
            13. 8.2.1.2.5.13 Soft Start (SS)
            14. 8.2.1.2.5.14 Remote Sense
            15. 8.2.1.2.5.15 Feedback Compensator Design
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Simultaneous Tracking With TPS40180 Devices
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 2-Phase Single Output With TPS40180
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Inductor Selection
          2. 8.2.3.2.2 Output Capacitor Selection
          3. 8.2.3.2.3 Input Capacitor Selection
          4. 8.2.3.2.4 Peripheral Component Design
            1. 8.2.3.2.4.1 PSEL Pin
            2. 8.2.3.2.4.2 CLKIO Pin
            3. 8.2.3.2.4.3 RT Pin
            4. 8.2.3.2.4.4 SS Pin
            5. 8.2.3.2.4.5 DIFFO Pin and FB Pin
            6. 8.2.3.2.4.6 COMP Pin
            7. 8.2.3.2.4.7 VSH Pin
            8. 8.2.3.2.4.8 Other Pins
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Stage
      2. 10.1.2 Device Peripheral
      3. 10.1.3 PowerPad Layout™
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Device Support

11.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.1.2 Device Nomenclature

    VIN(min) Minimum operating input voltage
    VIN(max) Maximum operating input voltage
    VOUT Output voltage
    IRIPPLE Inductor peak-peak ripple current
    ITRAN(max) Maximum load transient
    VUNDER Output voltage undershot
    VOVER Output voltage overshot
    VRIPPLE(totOUT) Total output ripple
    VRIPPLE(COUT) Output voltage ripple due to output capacitance
    VRIPPLE(CIN) Input voltage ripple due to input capacitance
    VRIPPLE(CinESR) Input voltage ripple due to the ESR of input capacitance
    PSW(cond) High side MOSFET switching loss
    ISWrms RMS current in the high side MOSFET
    RDS(on)(SW) ON drain-source resistance of the high side MOSFET
    PSW(sw) High side MOSFET switching loss
    IPK Peak current through the high side MOSFET
    RDRV Driver resistance of the high side MOSFET
    QgdSW Gate to drain charge of the high side MOSFET
    QgsSW Gate to source charge of the high side MOSFET
    VGSW Gate drive voltage of the high side MOSFET
    PSW(gate) Gate drive loss of the high side MOSFET
    QgSW Gate charge of the high side MOSFET
    PSW(tot) Total losses of the high side MOSFET
    PSR(cond) Low side MOSFET conduction loss
    ISRrms RMS current in the low side MOSFET
    RDS(on)(SR) ON drain-source resistance of the low side MOSFET
    PSR(gate) Gate drive loss of the low side MOSFET
    QgSR Gate charge of the low side MOSFET
    VgSR Gate drive voltage of the low side MOSFET
    PDIODE Power loss in the diode
    tD Dead time between the condiction of high and low side MOSFET
    Vf Forward voltage drop of the body diode of the low side MOSFET
    PSR(tot) Total losses of the low side MOSFET
    DCR Inductor DC resistance
    AC Gain of the current sensing amplifier, typically it is 13
    ROUT Output load resistance
    VRAMP Ramp amplitude, typically it is 0.5 V
    T Switching period
    GVC(s) Control to output transfer function
    GC(s) Compensator transfer function
    TV(s) Loop gain transfer function
    ACM Gain of the compensator
    fP The pole frequency of the compensator
    fZ The zero frequency of the compensator

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

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    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.