SLUS739F September   2006  – January 2016 TPS40200-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 MOSFET Gate Drive
      2. 7.3.2 Undervoltage Lockout Protection
      3. 7.3.3 Selecting the Operating Frequency
      4. 7.3.4 Synchronizing the Oscillator
      5. 7.3.5 Current-Limit Resistor Selection
      6. 7.3.6 Calculating the Soft-Start Time
      7. 7.3.7 Voltage Setting and Modulator Gain
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Near Minimum Input Voltage
      2. 7.4.2 Operation With SS Pin
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Regulator, 8-V to 12-V Input, 3.3-V or 5-V Output at 2.5 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 FET Selection Criteria
          2. 8.2.1.2.2 Rectifier Selection Criteria
          3. 8.2.1.2.3 Inductor Selection Criteria
          4. 8.2.1.2.4 Output Capacitance
          5. 8.2.1.2.5 Switching Frequency
          6. 8.2.1.2.6 Calculating the Overcurrent Threshold Level
          7. 8.2.1.2.7 Soft-Start Capacitor
          8. 8.2.1.2.8 Frequency Compensation
            1. 8.2.1.2.8.1 Step 1
            2. 8.2.1.2.8.2 Step 2
            3. 8.2.1.2.8.3 Step 3
            4. 8.2.1.2.8.4 Step 4
            5. 8.2.1.2.8.5 Step 5
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Application 2: 18-V to 50-V Input, 16-V Output at 1 A
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Application 3: Wide-Input-Voltage LED Constant-Current Driver
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Related Products
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C
    • Device HBM ESD Classification Level 1B
    • Device CDM ESD Classification Level C6
  • Input Voltage Range 4.5 V to 52 V
  • Output Voltage (700 mV to 90% VIN)
  • 200-mA Internal P-channel FET Driver
  • Voltage Feed-Forward Compensation
  • Undervoltage Lockout (UVLO)
  • Programmable Fixed-Frequency (35-kHz to 
    500-kHz) Operation
  • Programmable Short-Circuit Protection
  • Hiccup Overcurrent Fault Recovery
  • Programmable Closed-Loop Soft Start
  • 700-mV 1% Reference Voltage
  • External Synchronization
  • Small 8-Pin SOIC (D) Package

2 Applications

  • Automotive Controls
  • Automotive Power Supplies
  • Distributed Power Systems

3 Description

The TPS40200-Q1 is a flexible, nonsynchronous controller with a built-in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52 V, with a power-saving feature that turns off driver current once the external FET has been turned on fully. This feature extends the flexibility of the device, allowing it to operate with an input voltage up to 52 V without dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward input-voltage compensation that responds instantly to input voltage change. The integral
700-mV reference is trimmed to 2%, providing the means to accurately control low voltages. The TPS40200-Q1 is available in an 8-pin SOIC package and supports many of the features of more complex controllers. Clock frequency, soft start, and overcurrent limit are each easily programmed by a single, external component. The device has undervoltage lockout (UVLO) and can be easily synchronized to other controllers or a system clock to satisfy sequencing and/or noise-reduction requirements.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS40200-Q1 SOIC (8) 3.91 mm × 4.90 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.


Typical Application

TPS40200-Q1 typapp_lus659.gif

Typical Efficiency of Application Circuit

TPS40200-Q1 eff_v_iload_lus659.gif