10.1 Layout Guidelines
Consider the following points before starting the TPS51200-Q1 layout design.
- Place the input capacitors as close to VDLOIN pin as possible with short and wide connection.
- Place the output capacitor as close to VO pin as possible with short and wide connection. Place a ceramic capacitor with a value of at least 10-µF as close to VO pin if the rest of output capacitors need to be placed on the load side.
- Connect the VOSNS pin to the positive node of output capacitors as a separate trace. In DDR VTT application, connect the VO sense trace to DIMM side to ensure the VTT voltage at DIMM side is well regulated.
- Consider adding low-pass filter at VOSNS if the VO sense trace is very long.
- Connect the GND pin and PGND pin to the thermal pad directly.
- The device uses its thermal pad to dissipate heat. In order to effectively remove heat from device package, place numerous ground vias on the thermal pad. Use large ground copper plane, especially the copper plane on surface layer, to pour over those vias on thermal pad.
- Consult the TPS51200EVM User's Guide (SLUU323) for detailed layout recommendations.