SLUSDW9A June   2020  – June 2020 TPS51215A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switch Mode Power Supply Control
      2. 7.3.2  VREF, V0, V1, V2, V3 and Output Voltage
      3. 7.3.3  Soft-Start and Power Good
      4. 7.3.4  SLEW and VID Function
      5. 7.3.5  MODE Pin Configuration
      6. 7.3.6  Light-Load Operation
      7. 7.3.7  Out-of-Bound Operation
      8. 7.3.8  Current Sensing and Overcurrent Protection
      9. 7.3.9  Overvoltage and Undervoltage Protection
      10. 7.3.10 V5IN Undervoltage Lockout Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 D-CAP2 Control Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
  9. 9 Typical Applications
    1. 9.1 Design Requirements
    2. 9.2 Detailed Design Procedure
      1. 9.2.1 Step One: Determine the Specifications
      2. 9.2.2 Step Two: Determine System Parameters
      3. 9.2.3 Step Three: Determine Inductor Value and Choose Inductor
      4. 9.2.4 Step Four: Set the Output Voltages
      5. 9.2.5 Step Five: Calculate SLEW Capacitance
      6. 9.2.6 Step Six
      7. 9.2.7 Step Seven: Determine the Output Capacitance
      8. 9.2.8 Step Eight: Select Decoupling and Peripheral Components
    3. 9.3 Application Examples
      1. 9.3.1 Design 1: 2-Bit VID ICC(max) = 30 A, DCAP2 600-kHz Application for VCCIN_AUX in Intel TigerLake platform
      2. 9.3.2 Design 2: 2-Bit VID, ICC(max) = 10 A, for VCCIO_1_2 in Intel RocketLake - S platform
    4. 9.4 Application Curves of Design 1
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information
      2. 13.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Over recommended free-air temperature range, VIN = 12 V, V5IN = 5V, TJ = -40°C to 125°C, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input Voltage Range VIN 3 28 V
IV5IN V5IN Supply Current No load, VEN=3.3V,Vout ≠0, Non Switching, VMODE=5V 610 µA
V5IN Stand-by Current No load, VEN=3.3V, Vout=0 250 µA
IV5INSDN V5IN Shutdown Current No load, VEN=0V 1 µA
UVLO
VV5IN_UVLO V5IN Under-Voltage Lockout Wake up V5IN voltage 4.4 4.6 V
Shut down V5IN voltage 3.8 4 V
Hysteresis V5IN voltage 400 mV
VREF VOLTAGE
VVREF Output Voltage IVREF = 30 µA, w/r/t GSNS 2 V
VVREFTOL Output Voltage Tolerance 0 µA ≤IVREF ≤ 30 µA, 0°C ≤TJ ≤ 85°C –0.8 0.8 %
0 µA ≤IVREF ≤ 300 µA, -40°C ≤TJ ≤ 125°C –1 1 %
IVREFOCL Current Limit VVREF-GSNS = 1.7V 0.4 1 mA
DUTY CYCLE and FREQUENCY CONTROL
FSW Switching Frequency (1) VIN = 12 V, VVSNS = 1.8 V, VMODE =5V 600 kHz
TON(MIN) Minimum On-time DRVH rising to falling 40 ns
TOFF(MIN) Minimum Off-time DRVH falling to rising 320 ns
DRIVERS
RDRVH High-side Driver Resistance Source, IDRVH = 50 mA 1.5 Ω
Sink, IDRVH = 50 mA 0.6 Ω
RDRVL Ligh-side Driver Resistance Source, IDRVL = 50 mA 0.9 Ω
Sink, IDRVL = 50 mA 0.4 Ω
tD Dead Time DRVH-off to DRVL-on 14 ns
DRVL-off to DRVH-on 21 ns
SOFTSTART AND SLEWRATE
ISLEW During Soft Start 4.5 µA
During Vout Dynamic Scaling 45 µA
POWER GOOD
TPGDLY PG Deglitch Time PG from low to high 1 ms
PG from high to low 0.2 us
VPGTH PG Threshold VOUT falling (fault) 84 %
VOUT rising (good) 92 %
VOUT rising (fault) 116 %
VOUT falling (good) 108 %
IPGMAX PG Sink Current VPGOOD =0.5V 6 mA
IPGLK PG Leak Current VPGOOD =5.5V 1 uA
CURRENT LIMIT
ITRIP TRIP source current TJ = 25°C, VTRIP = 0.4 V 9 10 11 µA
TCTRIP TRIP source current temperature coefficient(1) 4700 ppm/C
VTRIP VTRIP Voltage Range 0.2 3 V
VOCL Current Limit Threshold VTRIP = 3.0V 360 375 390 mV
VTRIP = 1.6V 188 200 212
VTRIP = 0.2V 20 25 30
VNOCL Negative Current Limit Threshold VTRIP = 3.0V –390 –375 –360 mV
VTRIP = 1.6V –212 –200 –188
VTRIP = 0.2V –30 –25 –20
LOGIC THRESHOLD
VEN(ON) EN Threshold High-level 1.5 V
VEN(OFF) EN Threshold Low-level 0.5 V
VEN(HSYS) EN Hysteresis 250 mV
IEN EN Leakage Current –1 1 uA
VVIDx(HI) VIDx Threshold High-level 0.9 V
VVIDx(LI) VIDx Threshold Low-level 0.3 V
IVIDx VIDx Leakage Current –1 1 uA
OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION
VOVP OVP Trip Threshold 118 120 123 %
TOVPDLY OVP Deglitch Time 0.2 us
VUVP UVP Trip Threshold 65 68 70 %
TUVPDLY UVP Deglitch Time 1 ms
VOUT VOLTAGE
VSLEWCLP SLEW Clamp Voltage VREFIN = 1.1 V 1.012 1.188 V
gM Error Amplifier Transconductance VREFIN = 1.1 V 60 us
ISNS VSNS Input Current VVSNS = 1.1 V 20 uA
IVSNSDIS VSNS Discharge Current EN=0, VVSNS=0.5V,VMODE = 5V 12 mA
OUTPUT DISCHARGE
RDIS Discharge Resistance TJ=25°C, VVOUT =0.5V, VEN=0V 42 Ω
Thermal protection
TOTP OTP Trip Threshold 140 °C
TOTPHSY OTP Hysteresis 10 °C