The TPS51215A is a single-phase, D-CAP2™ synchronous buck controller with a 2-bit VID input supporting 0 V and three other independent externally programmable output voltage levels, where full external programmability of the voltage level, step setting and voltage-change slew rate is desired. It is used for Intel IMVP8/9 applications where multiple voltage levels are desired.
The TPS51215A supports all POS/SPCAP and/or all ceramic MLCC output capacitor options in applications where remote sense is a requirement. Tight DC load regulation is achieved through external programmable integrator capacitor. The TPS51215A provides full protection suite, including OVP, OCL, 5-V UVLO and thermal shutdown. It supports the conversion voltage up to 28 V, and output voltages adjustable from 0.5 V to 2 V.
The TPS51215A is available in the 3 mm × 3 mm, QFN, 0.4-mm pitch package and is specified from –40°C to 125°C.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | TPS51215A Single Phase, D-CAP2TM Controller with 2-Bit VID Control and Low Power Mode datasheet (Rev. A) | PDF | HTML | Jun 7, 2020 |
| Design guide | Alder Lake and Raptor Lake VCCIN_AUX Rail in PC Applications Reference Design | PDF | HTML | Nov 8, 2022 | |
| Application note | Non-Isolated Point-of-Load Solutions for Tiger Lake in PC Applications (Rev. B) | PDF | HTML | Apr 29, 2021 | |
| Application note | Non-Isolated DC/DC Solutions for Alder Lake in Notebook Computing Applications | PDF | HTML | Jan 8, 2021 | |
| Application note | Non-Isolated Point-of-Load Solutions for Elkhart Lake in Industrial PC App. (Rev. A) | PDF | HTML | May 21, 2020 | |
| Certificate | TPS51215AEVM EU Declaration of Conformity (DoC) | May 14, 2020 |
For additional terms or required resources, click any title below to view the detail page where available.
This power-supply reference design supports VCCIN_AUX rail in Intel® Alder Lake and Raptor Lake platform. Using TPS51215A controller combined with an operational amplifier could support the control functions including VID control, load line (LL) and current monitor (IMON). The position for test (...)
Advanced processors and platforms such as the Intel® Tiger Lake micro-architecture need point-of-load (POL) solutions for memory, low-power CPU rails, and 3.3V and 5V rail requirements from an array of rechargeable batteries, or a 12V input bus.
This power-supply design highlights the latest (...)
Advanced processors and platforms, such as the Intel® Elkhart Lake micro-architecture, need point-of-load (POL) solutions for memory, low-power CPU rails, and 3.3V and 5V rail requirements from an array of rechargeable batteries or a 12V input bus.
This power-supply design highlights the latest (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WQFN (RUK) | 20 | Ultra Librarian |
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