SLVS845G March 2009 – August 2014 TPS54362-Q1
TI recommends the following guidelines for PCB layout of the TPS54362-Q1 device.
Use a low-EMI inductor with a ferrite-type shielded core. Other types of inductors may be used; however, they must have low-EMI characteristics and be located away from the low-power traces and components in the circuit.
Input ceramic filter capacitors should be located in close proximity to the VIN pin. TI recommends surface-mount capacitors to minimize lead length and reduce noise coupling.
Route the feedback trace such that there is minimum interaction with any noise sources associated with the switching components. Recommended practice is to place the inductor away from the feedback trace to prevent EMI noise.
All power (high-current) traces should be thick and as short as possible. The inductor and output capacitors should be as close to each other as possible. This reduces the EMI radiated by the power traces due to high switching currents.
In a two-sided PCB, TI recommends having ground planes on both sides of the PCB to help reduce noise and ground-loop errors. Connect the ground connection for the input and output capacitors and IC ground to this ground plane.
In a multilayer PCB, the ground plane separates the power plane (where high switching currents and components are placed) from the signal plane (where the feedback trace and components are) for improved performance.
Also, arrange the components such that the switching-current loops curl in the same direction. Place the high-current components such that during conduction the current path is in the same direction. Doing so prevents magnetic field reversal caused by the traces between the two half cycles, helping to reduce radiated EMI.