SLVSCM3B january   2015  – august 2023 TPS62065-Q1 , TPS62067-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6.     Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Mode Selection (TPS62065-Q1) and Forced PWM Mode (TPS62067A-Q1)
      2. 9.3.2 Power Good (PG, TPS62067x-Q1)
      3. 9.3.3 Enable
      4. 9.3.4 Shutdown and Output Discharge
      5. 9.3.5 Soft Start
      6. 9.3.6 Undervoltage Lockout (UVLO)
      7. 9.3.7 Internal Current Limit and Foldback Current Limit For Short-Circuit Protection
      8. 9.3.8 Clock Dithering
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Save Mode
        1. 9.4.1.1 Dynamic Voltage Positioning
        2. 9.4.1.2 100% Duty-Cycle Low-Dropout Operation
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Output Voltage Setting
        2. 10.2.2.2 Output Filter Design (Inductor And Output Capacitor)
          1. 10.2.2.2.1 Inductor Selection
          2. 10.2.2.2.2 Output Capacitor Selection
          3. 10.2.2.2.3 Input Capacitor Selection
        3. 10.2.2.3 Checking Loop Stability
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
10.2.2.2.2 Output Capacitor Selection

The advanced fast-response voltage mode control scheme of the devices allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies and can not be used. For most applications, a nominal 10-µF or 22-µF capacitor is suitable. At small ceramic capacitors, the DC-bias effect decreases the effective capacitance. Therefore, a 22-µF capacitor can be used for output voltages higher than 2 V, see the list of capacitors.

In case additional ceramic capacitors in the supplied system are connected to the output of the DC/DC converter, the output capacitor COUT must be decreased to not exceed the recommended effective capacitance range. In this case, a loop stability analysis must be performed as described later.

At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:

Equation 8. GUID-56FE71E6-050C-401C-9181-590C9AD19726-low.gif