Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS62134x family of devices are synchronous step-down converters based on the DCS-Control™ topology. The following section discusses the design of the external components to complete the power-supply design for power rails in the Intel Skylake platform.
The design guideline provides component selection to operate the device within the values listed in the Recommend Operating Conditions section. Meanwhile, the design meets the time and slew rate requirements of the Intel Skylake platform for VCC(IO), VCC(PRIM_CORE), VCC(EDRAM), and VCC(EOPIO) rails. Table 3 lists the components used for the curves in the Application Curves section.
|TPS62134x||High efficiency step down converter||TI|
|L1||Inductor, 1 µH, XFL4020-102ME||Coilcraft|
|C1||Ceramic capacitor, 22 µF, GRM21BR61E226ME44L||Murata|
|C2||Ceramic capacitor, 47 µF, GRM21BR60J476ME15L||Murata|
|C3||Ceramic capactor, 470 pF, GRM188R71H471KA01D||Murata|
|R3||Resistor, 499 kΩ||Standard|
The first step of the design procedure is the selection of the output-filter components. The combinations listed in Table 4 are used to simplify the output filter component selection.
|22 µF||47 µF||100 µF||200 µF||400 µF|
The inductor selection is affected by several effects such as inductor-ripple current, output-ripple voltage, PWM-to-PSM transition point, and efficiency. In addition, the selected inductor must be rated for appropriate saturation current and DC resistance (DCR). Use Equation 4 to calculate the maximum inductor current under static load conditions.
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation current. A margin of approximately 20% is recommended to be added. The inductor value also determines the load current at which power save mode is entered:
Table 5 lists inductors that are recommended to use with the TPS62134x device.
|TYPE||INDUCTANCE (µH)||CURRENT (A)||DIMENSIONS (L × B × H, mm)||MANUFACTURER|
|XFL4020-102ME||1 µH||4.7||4 × 4 × 2||Coilcraft|
|DFE252012F||1 µH||5.0||2.5 × 2 × 1.2||Toko|
|DFE201612E||1 µH||4.1||2 × 1.6 × 1.2||Toko|
|PISB25201T||1 µH||3.9||2.5 × 2 × 1||Cyntec|
|PIME031B||1 µH||5.4||3.1 × 3.4 × 1.2||Cyntec|
The recommended value for the output capacitor is 47 µF. The architecture of the TPS62134x family of devices allows the use of tiny ceramic output capacitors which have low equivalent series resistance (ESR). These capacitors provide low output-voltage ripple and are recommended. Using an X7R or X5R dielectric is recommended to maintain low resistance up to high frequencies and to achieve narrow capacitance variation with temperature. Using a higher value can have some advantages such as smaller voltage ripple and a tighter DC output accuracy in PWM. See Optimizing the TPS62130/40/50/60/70 Output Filter, SLVA463 for additional information.
Note that in power save mode, the output voltage ripple depends on the output capacitance, ESR, and peak inductor current. Using ceramic capacitors provides small ESR and low ripple.
For most applications, using a capacitor with a value of 22 µF is a recommended. Larger values further reduce input-current ripple. The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. A ceramic capacitor which has low ESR is recommended for best filtering and should be placed between the PVIN and PGND pins and as close as possible to those pins.
A capacitor connected between the SS pin and the AGND pin allows a user programmable startup slope of the output voltage. A constant current source supports 2.5 µA to charge the external capacitance. Use Equation 6 to calculate the capacitor value required for a given soft-start time.
Leave the SS pin floating for fastest startup.
The maximum output voltage must be less than 1.9 V. The required feed forward capacitor, C4, improves the loop stability performance. 5 pF is sufficient for most of applications with the R1 and R2 values shown. R1, R2 and C4 must be located close to the IC.