SLVS676D JUNE   2006  – July 2015 TPS62420 , TPS62421


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Converter 1
      2. 8.1.2 Converter 2
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dynamic Voltage Positioning
      2. 8.3.2 Undervoltage Lockout
      3. 8.3.3 Mode Selection
      4. 8.3.4 Enable
      5. 8.3.5 DEF_1 Pin Function
      6. 8.3.6 180° Out-of-Phase Operation
      7. 8.3.7 Thermal Shutdown
      8. 8.3.8 Short Circuit Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft-Start
      2. 8.4.2 100% Duty Cycle Low Dropout Operation
      3. 8.4.3 Power-Save Mode
    5. 8.5 Programming
      1. 8.5.1 EasyScale™ Interface: One-Pin Serial Interface for Dynamic Output Voltage Adjustment
        1. General
        2. Protocol
        3. Bit Decoding
        4. Acknowledge
        5. MODE Selection
    6. 8.6 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Voltage Setting
        1. Converter 1 Adjustable Default Output Voltage Setting
        2. Converter 2
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application Circuit 1.5-V and 2.85-V Adjustable Outputs
        1. Design Requirements
        2. Detailed Design Procedure
          1. Output Filter Design (Inductor and Output Capacitor)
            1. Inductor Selection
            2. Output Capacitor Selection
            3. Input Capacitor Selection
        3. Application Curves
      2. 9.2.2 Typical Application Circuit TPS62421
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 Output Voltage Setting Converter 1 Adjustable Default Output Voltage Setting

The output voltage can be calculated to:

Equation 4. TPS62420 TPS62421 q4_vout_lvs676.gif

To keep the operating current to a minimum, TI recommends selecting R12 within a range of 180 kΩ to 360 kΩ. The sum of R12 and R11 should not exceed ~1 MΩ. For higher output voltages than 3.3 V, TI recommends choosing lower values than 180 kΩ for R12. Route the DEF_1 line away from noise sources, such as the inductor or the SW1 line. The FB1 line needs to be directly connected to the output capacitor. An internal feed-forward capacitor is connected to this pin, therefore there is no need for an external feed-forward capacitor for converter 1. Converter 2

The default output voltage of converter 2 can be set by an external resistor network. For converter 2 the same recommendations apply as for converter 1. In addition to that, a 33-pF external feed-forward capacitor Cff2 for good load transient response must be used.

The output voltage can be calculated to:

Equation 5. TPS62420 TPS62421 q5_vout1_lvs676.gif

Route the ADJ2 line away from noise sources, such as the inductor or the SW2 line. In case the interface is used for converter 2, connect ADJ2 pin directly to VOUT2

9.2 Typical Applications

9.2.1 Typical Application Circuit 1.5-V and 2.85-V Adjustable Outputs

TPS62420 TPS62421 typ_app_las676.gifFigure 14. Typical Application Circuit 1.5-V and 2.85-V Adjustable Outputs Design Requirements

The step-down converter design can be adapted to different output voltage and load current needs by choosing external components appropriate. The following design procedure is adequate for whole VIN, VOUT and load current range of TPS62420. Detailed Design Procedure Output Filter Design (Inductor and Output Capacitor)

The device is optimized to operate with inductors of 2.2 μH to 4.7 μH and output capacitors of 10 μF to 22 μF.

For operation with a 2.2-μH inductor, a 22-μF capacitor is suggested. Inductor Selection

The selected inductor has to be rated for its DC resistance and saturation current. The DC resistance of the inductance will influence directly the efficiency of the converter. Therefore an inductor with lowest DC resistance should be selected for highest efficiency.

Equation 6 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 7. This is recommended because during heavy load transient the inductor current will rise above the calculated value.

Equation 6. TPS62420 TPS62421 q6_deltai_lvs676.gif
Equation 7. TPS62420 TPS62421 q7_ilmax_lvs676.gif


  • f = Switching frequency (2.25 MHz typical)
  • L = Inductor value
  • ΔIL= Peak-to-peak inductor ripple current
  • ILmax = Maximum inductor current

The highest inductor current will occur at maximum VIN.

Open core inductors have a soft saturation characteristic and they can usually handle higher inductor currents versus a comparable shielded inductor.

A more conservative approach is to select the inductor current rating just for the maximum switch current of the corresponding converter. It must be considered, that the core material from inductor to inductor differs and will have an impact on the efficiency especially at high switching frequencies.

Refer to Table 7 and the typical applications for possible inductors.

Table 7. List of Inductors

3.2 × 2.6 × 1.0 MIPW3226 FDK
3 × 3 × 0.9 LPS3010 Coilcraft
2.8 × 2.6 × 1.0 VLF3010 TDK
2.8 x 2.6 × 1.4 VLF3014 TDK
3 × 3 × 1.4 LPS3015 Coilcraft
3.9 × 3.9 × 1.7 LPS4018 Coilcraft Output Capacitor Selection

The advanced fast response voltage mode control scheme of the two converters allows the use of small ceramic capacitors with a typical value of 10 μF, without having large output voltage undershoots and overshoots during heavy load transients. Ceramic X7R/X5R capacitors having low ESR values result in lowest output voltage ripple and are therefore recommended.

If ceramic output capacitors are used, the capacitor RMS ripple current rating will always meet the application requirements. The RMS ripple current is calculated as:

Equation 8. TPS62420 TPS62421 q8_irmscout_lvs676.gif

At nominal load current the inductive converters operate in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor:

Equation 9. TPS62420 TPS62421 q9_deltav_lvs676.gif

Where the highest output voltage ripple occurs at the highest input voltage VIN.

At light load currents the converters operate in power-save mode and the output voltage ripple is dependent on the output capacitor value. The output voltage ripple is set by the internal comparator delay and the external capacitor. Higher output capacitors like 22-μF values minimize the voltage ripple in PFM mode and tighten DC output accuracy in PFM mode. Input Capacitor Selection

Because of the nature of the buck converter having a pulsating input current, a low-ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. The converters need a ceramic input capacitor of 10 μF. The input capacitor can be increased without any limit for better input voltage filtering. Application Curves

TPS62420 TPS62421 eff_vo_11_lvs676.gifFigure 15. Efficiency VOUT1 = 1.1 V
TPS62420 TPS62421 eff_vo_18_lvs676.gifFigure 17. Efficiency VOUT2 = 1.8 V
TPS62420 TPS62421 eff_vi_lvs676.gifFigure 19. Efficiency vs VIN , VOUT1 = 1.575 V
TPS62420 TPS62421 dc_op_11_lvs676.gifFigure 21. DC Output Accuracy VOUT1 = 1.575 V
TPS62420 TPS62421 ll_vo_las676.gifFigure 23. Light Load Output Voltage Ripple
in Power-Save Mode
TPS62420 TPS62421 vo_rip2_las676.gifFigure 25. Output Voltage Ripple
in PWM Mode
TPS62420 TPS62421 ld_tran_las676.gifFigure 27. Load Transient Response PFM/PWM
TPS62420 TPS62421 ln_trans_las676.gifFigure 29. Line Transient Response
TPS62420 TPS62421 typ_oper_las676.gifFigure 31. Typical Operation VIN = 3.6 V,
VOUT1 = 1.575 V, VOUT2 = 1.8 V
TPS62420 TPS62421 typ_oper3_las676.gifFigure 33. Typical Operation VIN = 3.6 V,
VOUT1 = 1.2 V, VOUT2 = 1.2 V
TPS62420 TPS62421 eff_vo_15_lvs676.gifFigure 16. Efficiency VOUT1 = 1.575 V
TPS62420 TPS62421 eff_vo_33_lvs676.gifFigure 18. Efficiency VOUT2 = 3.3 V
TPS62420 TPS62421 eff_vi2_lvs676.gifFigure 20. Efficiency vs VIN, VOUT2 = 3.3 V
TPS62420 TPS62421 dc_op_33_lvs676.gifFigure 22. DC Output Accuracy VOUT2 = 3.3 V
TPS62420 TPS62421 vo_rip_las676.gifFigure 24. Output Voltage Ripple in Forced PWM Mode
TPS62420 TPS62421 pwm_pfm_las676.gifFigure 26. Forced PWM/PFM Mode Transition
TPS62420 TPS62421 ld_tran2_las676.gifFigure 28. Load Transient Response PWM Operation
TPS62420 TPS62421 startup_las676.gifFigure 30. Start-Up Timing One Converter
TPS62420 TPS62421 typ_oper2_las676.gifFigure 32. Typical Operation VIN = 3.6 V,
VOUT1 = 1.8 V, VOUT2 = 3 V
TPS62420 TPS62421 easy_scle_las676.gifFigure 34. VOUT1 Change With EasyScale™ Interface

9.2.2 Typical Application Circuit TPS62421

In fixed output voltage version TPS62421, the default output voltage of converter 1 is fixed to 1.2 V or 1.8 V depending on the DEF_1 pin level. The default output voltage of converter 2 is fixed to 1.8 V. The ADJ2 pin must be connected directly to the converter 2 output voltage.

TPS62420 TPS62421 typapp_62421_lvs676.gifFigure 35. Typical Application Circuit TPS62421