SLVSD87C december   2015  – may 2023 TPS65262-2

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting Undervoltage Lockout
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  PSM
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Overcurrent Protection
        1. 7.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 7.3.11 Power Good
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 4.5 V (Minimum VIN)
      2. 7.4.2 Operation with EN Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 V7V Low Dropout Regulator and Bootstrap

Power for the high-side and low-side MOSFET drivers and most other internal circuitry is derived from the V7V pin. The internal built-in low dropout linear regulator (LDO) supplies 6.3 V (typical) from VIN to V7V. A 10-µF ceramic capacitor must be connected from V7V pin to power ground.

If the input voltage, VIN decreases to UVLO threshold voltage, the UVLO comparator detects V7V pin voltage and forces the converter off.

Each high-side MOSFET driver is biased from the floating bootstrap capacitor, CB, shown in Figure 7-4, which is normally recharged during each cycle through an internal low-side MOSFET or the body diode of low-side MOSFET when the high-side MOSFET turns off. The boot capacitor is charged when the BST pin voltage is less than VIN and BST-LX voltage is below regulation. The recommended value of this ceramic capacitor is 47 nF. TI recommends a ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or higher because of the stable characteristics overtemperature and voltage. Each low-side MOSFET driver is powered from V7V pin directly.

To improve drop out, the device is designed to operate at 100% duty cycle as long as the BST to LX pin voltage is greater than the BST-LX UVLO threshold, which is typically 2.1 V. When the voltage between BST and LX drops below the BST-LX UVLO threshold, the high-side MOSFET is turned off and the low-side MOSFET is turned on allowing the boot capacitor to be recharged.

GUID-20230502-SS0I-XLMB-BMM6-RFVLQ8HMCK1P-low.svg Figure 7-4 V7V Linear Dropout Regulator and Bootstrap Voltage Diagram