SLVSE56 November   2017 TPS65320D-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Buck Regulator
        1. 7.3.1.1  Fixed-Frequency PWM Control
        2. 7.3.1.2  Slope Compensation Output
        3. 7.3.1.3  Pulse-Skip Eco-mode™ Control Scheme
        4. 7.3.1.4  Dropout Mode Operation and Bootstrap Voltage (BOOT)
        5. 7.3.1.5  Error Amplifier
        6. 7.3.1.6  Voltage Reference
        7. 7.3.1.7  Adjusting the Output Voltage
        8. 7.3.1.8  Soft-Start Pin (SS)
        9. 7.3.1.9  Overload-Recovery Circuit
        10. 7.3.1.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
        11. 7.3.1.11 Overcurrent Protection and Frequency Shift
        12. 7.3.1.12 Selecting the Switching Frequency
        13. 7.3.1.13 How to Interface to RT/CLK Pin
        14. 7.3.1.14 Overvoltage Transient Protection
        15. 7.3.1.15 Small-Signal Model for Loop Response
        16. 7.3.1.16 Simple Small-Signal Model for Peak-Current Mode Control
        17. 7.3.1.17 Small-Signal Model for Frequency Compensation
      2. 7.3.2 LDO Regulator
        1. 7.3.2.1 Charge-Pump Operation
        2. 7.3.2.2 Low-Voltage Tracking
        3. 7.3.2.3 Adjusting the Output Voltage
      3. 7.3.3 Thermal Shutdown
      4. 7.3.4 Power-Good Output, nRST
      5. 7.3.5 Enable and Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 2.2-MHzSwitching Frequency, 9-V to 16-V Input, 5-V Output Buck Regulator, 3.3-V Output LDO Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Switching Frequency Selection for the Buck Regulator
          2. 8.2.1.2.2  Output Inductor Selection for the Buck Regulator
          3. 8.2.1.2.3  Output Capacitor Selection for the Buck Regulator
          4. 8.2.1.2.4  Catch Diode Selection for the Buck Regulator
          5. 8.2.1.2.5  Input Capacitor Selection for the Buck Regulator
          6. 8.2.1.2.6  Soft-Start Capacitor Selection for the Buck Regulator
          7. 8.2.1.2.7  Bootstrap Capacitor Selection for the Buck Regulator
          8. 8.2.1.2.8  Output Voltage and Feedback Resistor Selection for the Buck Regulator
          9. 8.2.1.2.9  Frequency Compensation Selection for the Buck Regulator
          10. 8.2.1.2.10 LDO Regulator
          11. 8.2.1.2.11 Power Dissipation
            1. 8.2.1.2.11.1 Power Dissipation Losses of the Buck Regulator
          12. 8.2.1.2.12 Power Dissipation Losses of the LDO Regulator
          13. 8.2.1.2.13 Total Device Power Dissipation Losses and Junction Temperature
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following:

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.