SBVS355C June   2019  – May 2022 TPS745-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 TPS745-Q1 Comparison
      2. 7.3.2 Undervoltage Lockout (UVLO)
      3. 7.3.3 Shutdown
      4. 7.3.4 Foldback Current Limit
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Device Feedback Resistors
      2. 8.1.2 Input and Output Capacitor Selection
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Exiting Dropout
      5. 8.1.5 Reverse Current
      6. 8.1.6 Power Dissipation (PD)
      7. 8.1.7 Power-Good Function
      8. 8.1.8 Feed-Forward Capacitor (CFF)
      9. 8.1.9 Start-Up Sequencing
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Current
        2. 8.2.2.2 Thermal Dissipation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Typical Characteristics

at operating temperature range TJ = 25°C, VIN = VOUT(NOM) + 0.5 V or 1.5 V (whichever is greater), IOUT = 1 mA, VEN = VIN, and CIN = COUT = 1 µF (unless otherwise noted)

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VOUT = 0.55 V, IOUT = 1 mA
Figure 6-1 Output Voltage vs Ambient Temperature
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VOUT = 5 V, IOUT = 1 mA
Figure 6-3 Output Voltage vs Ambient Temperature
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0.65-V, 3.3-V, and 5-V options, IOUT = 1 mA
Figure 6-5 Temperature Drift Histogram (25°C to 150°C)
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VOUT = 0.55 V, IOUT = 1 mA
Figure 6-7 0.55-V Line Regulation vs VIN
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Figure 6-9 3.3-V Dropout Voltage vs IOUT
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Figure 6-11 5.5-V Dropout Voltage vs IOUT
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Figure 6-13 IGND vs IOUT
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VOUT = 3.3 V, IOUT = 0 mA
Figure 6-15 IQ vs VIN
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VIN = 2 V, VOUT = 0.55 V
Figure 6-17 0.55-V Load Regulation vs IOUT
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Figure 6-19 VOUT vs IOUT Pulldown Resistor
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Figure 6-21 IIkg(PG) vs Temperature and PG Pin Voltage
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VIN = 1.5 V, VOUT = 0.55 V
Figure 6-23 VOL(PG) vs PG Pin Sink Current
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B version
Figure 6-25 tPGDH vs Temperature (For TPS746B Only)
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Figure 6-27 VEN(HI) and VEN(LO) vs Temperature
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Figure 6-29 3.3-V VOUT vs IOUT
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VOUT = 3.3 V, IOUT = 1 mA, VIN slew rate = 1 V/µs
Figure 6-31 3.3-V Line Transient
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VIN = 2 V, VOUT = 0.55 V, IOUT slew rate = 1 A/µs
Figure 6-33 0.55-V, 1-mA to 500-mA Load Transient
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 1 mA
Figure 6-35 VIN Power-Up
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VOUT = 3.3 V, IOUT = 500 mA, COUT = 2.2 µF
Figure 6-37 PSRR vs Frequency and VIN
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VOUT = 3.3 V, IOUT = 250 mA, COUT = 2.2 µF
Figure 6-39 PSRR vs Frequency and VIN
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IOUT = 500 mA, COUT = 2.2 µF
Figure 6-41 PSRR vs Frequency
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 500 mA
Figure 6-43 PSRR vs Frequency and CFF
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VIN = 3.8 V, VOUT = 3.3 V, COUT = 2.2 µF, VRMS BW = 10 Hz to 100 kHz
Figure 6-45 Output Spectral Noise Density vs Frequency and IOUT
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 100 mA, CFF = 0 µF, VRMS BW = 10 Hz to 100 kHz
Figure 6-47 Output Spectral Noise Density vs Frequency and COUT
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VOUT = 3.3 V, IOUT = 1 mA
Figure 6-2 Output Voltage vs Ambient Temperature
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0.65-V, 3.3-V, and 5-V options, IOUT = 1 mA
Figure 6-4 Temperature Drift Histogram (–40°C to +25°C)
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VOUT = 3.3 V, IOUT = 1 mA
Figure 6-6 3.3-V Line Regulation vs VIN
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VOUT = 5.5 V, IOUT = 1 mA
Figure 6-8 5.5-V Line Regulation vs VIN
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Figure 6-10 0.55-V Dropout Voltage vs IOUT
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IOUT = 500 mA
Figure 6-12 VDO vs VOUT
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VEN = 0 V
Figure 6-14 ISHDN vs VIN
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VIN = 3.8 V, VOUT = 3.3 V
Figure 6-16 3.3-V Load Regulation vs IOUT
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VIN = 6 V, VOUT = 5.5 V
Figure 6-18 5.5-V Load Regulation vs IOUT
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Figure 6-20 PGLTH and PGHTH vs Temperature
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VIN = 3.8 V, VOUT = 3.3 V
Figure 6-22 VOL(PG) vs PG Pin Sink Current
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Figure 6-24 tPGDH vs Temperature
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Figure 6-26 tPGDL vs Temperature
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VEN = 5.5 V
Figure 6-28 IEN vs VIN
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VOUT = 0.55 V, IOUT = 1 mA, VIN slew rate = 1 V/µs
Figure 6-30 0.55-V Line Transient
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VIN = 3.8 V, VOUT = 3.3 V, IOUT slew rate = 1 A/µs
Figure 6-32 3.3-V, 1-mA to 500-mA Load Transient
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VIN = 5.5 V, VOUT = 5 V, IOUT slew rate = 1 A/µs
Figure 6-34 5-V, 1-mA to 500-mA Load Transient
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 1 mA
Figure 6-36 Start-Up With EN
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VOUT = 3.3 V, IOUT = 500 mA, COUT = 2.2 µF
Figure 6-38 PSRR vs Frequency and VIN
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VOUT = 3.3 V, IOUT = 250 mA, COUT = 2.2 µF
Figure 6-40 PSRR vs Frequency and VIN
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 500 mA
Figure 6-42 PSRR vs Frequency and COUT
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VIN = 3.8 V, VOUT = 3.3 V, COUT = 2.2 µF
Figure 6-44 PSRR vs Frequency and ILOAD
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VIN = 3.8 V, VOUT = 3.3 V, IOUT = 500 mA, COUT = 2.2 µF, VRMS BW = 10 Hz to 100 kHz
Figure 6-46 Output Spectral Noise Density vs Frequency and CFF
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IOUT = 500 mA, COUT = 2.2 µF, VRMS BW = 10 Hz to 100 kHz
 
Figure 6-48 Output Spectral Noise Density vs Frequency