SBVS338E March 2020 – December 2021 TPS7A20

PRODUCTION DATA

- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information

- DQN|4

Circuit reliability demands that proper consideration be given to device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must be as free as possible of other heat-generating devices that cause added thermal stresses.

As a first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. Use Equation 2 to approximate P_{D}:

Equation 2. P_{D} = (V_{IN} – V_{OUT}) × I_{OUT}

Power dissipation can be minimized, and thus greater efficiency achieved, by proper selection of the system voltage rails. Proper selection allows the minimum input-to-output voltage differential to be obtained. The low dropout of the TPS7A20 allows for maximum efficiency across a wide range of output voltages.

The main heat conduction path for the device is through the thermal pad on the package. As such, the thermal pad must be soldered to a copper pad area under the device. This pad area contains an array of plated vias that conduct heat to any inner plane areas or to a bottom-side copper plane.

The maximum power dissipation determines the maximum allowable junction temperature (T_{J}) for the device. According to Equation 3, power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (R_{θJA}) of the combined PCB and device package and the temperature of the ambient air (T_{A}). Equation 4 rearranges Equation 3 for output current.

Equation 3. T_{J} = T_{A} + (R_{θJA} × P_{D})

Equation 4. I_{OUT} = (T_{J} – T_{A}) / [R_{θJA} × (V_{IN} – V_{OUT})]

Unfortunately, this thermal resistance (R_{θJA}) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The R_{θJA} recorded in the *Thermal Information* table is determined by the JEDEC standard, PCB, and copper-spreading area, and is only used as a relative measure of package thermal performance. For a well-designed thermal layout, R_{θJA} is actually the sum of the X2SON package junction-to-case (bottom) thermal resistance (R_{θJC(bot)}) plus the thermal resistance contribution by the PCB copper.