Because current is being regulated and is continuous, no output capacitance is required to supply the load and maintain output voltage. This regulation helps when designing a high-frequency PWM dimming on the LED load. When no output capacitor is used, the same design calculations for ΔIL-PP also apply to ΔILED-PP.
A capacitor placed in parallel with the LED load can be used to reduce ΔILED-PP while keeping the same average current through both the inductor and the LED load. With an output capacitor, the inductance can be lowered, making the magnetic smaller and less expensive. Alternatively, the circuit can be run at lower frequency with the same inductor value, improving the efficiency and increasing the maximum allowable average output voltage. A parallel output capacitor is also useful in applications where the inductor or input voltage tolerance is poor. Adding a capacitor that reduces ΔILED-PP to well below the target provides headroom for changes in inductance or VIN that might otherwise push the maximum ΔILED-PP too high.
Determine the output capacitance by establishing the desired ΔILED-PP and the LED dynamic resistance, rD. Calculate the dynamic resistance as the slope of the LED exponential DC characteristic at the nominal operating point as shown in Figure 31. Simply dividing the forward voltage by the forward current at the nominal operating point results in an incorrect value that is between 5 times and 10 times too high. Calculate total dynamic resistance for a string of n LEDs connected in series as the dynamic resistance of one device multiplied by n. Use Equation 22 and Equation 23 to estimate ΔILED-PP when using a parallel capacitor: