SLVSHK8A December 2023 – June 2024 TPSM64404 , TPSM64406 , TPSM64406E
PRODUCTION DATA
VCC is the output of the internal LDO sub-regulator used to supply the control circuits of the TPSM64406. The nominal VCC voltage is 3.3 V. The VOSNS pin is the input to the internal LDO. Connect this input to VOUT to provide the lowest possible input supply current. If the VOSNS voltage is less than 3.1 V, VIN1 and VIN2 directly power the internal LDO.
To prevent unsafe operation, VCC has UVLO protection that prevents switching if the internal voltage is too low. See VCC_UVLO and VCC_UVLO_HYS in the Section 6.5.
VCC must not be used to power external circuitry. Do not load VCC or short VCC to ground. VOSNS is an optional input to the internal LDO. Connect an optional high quality 0.1-µF to 1-µF capacitor from VOSNS to AGND for improved noise immunity.
The LDO provides the VCC voltage from one of two inputs: VIN or VOSNS. When VOSNS is tied to ground or below 3.1 V, the LDO derives power from VIN. The LDO input becomes VOSNS when VOSNS is tied to a voltage above 3.1 V. The VOSNS voltage must not exceed both VIN and 12 V.
Equation 8 specifies the LDO power loss reduction as:
The VOSNS input provides an option to supply the LDO with a lower voltage than VIN, thus minimizing the LDO input voltage relative to VCC and reducing power loss. For example, if the LDO current is 10 mA at 1 MHz with VIN = 24 V and VOUT = 5 V, the LDO power loss with VOSNS tied to ground is 10 mA × (24 V – 3.3 V) = 207 mW, while the loss with VOSNS tied to VOUT is equal to 10 mA × (5 V – 3.3 V) = 17 mW – a reduction of 190 mW.