SCDS247B Data sheet

SCDS247B October 2008 – February 2016 TS12A44513 , TS12A44514 , TS12A44515

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

PW|14
- MPDS360
D|14
- MPDS177G

Thermal pad, mechanical data (Package|Pins)

PW|14
- QFND305D
D|14
- QFND304D

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾⁽²⁾⁽³⁾

				MIN	MAX	UNIT
V_CC	Supply voltage			–0.3	13	V
V_NC V_NO V_COM	Analog voltage⁽⁴⁾			–0.3	V_CC + 0.3	V
I_NC I_NO I_COM I_IN	Analog current			-20	20	mA
I_NC I_NO I_COM I_IN	Peak current (pulsed at 1 ms, 10% duty cycle)				±30	mA
T_A	Operating temperature			–40	85	°C
P_D	Power dissipation	Mounted on JEDEC 4-layer board (JESD 51-7), No airflow, T_A = 25°C, T_J = 125°C	PW package		0.88	W
T_stg	Storage temperature			–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum

(3) Voltages referenced to GND

(4) Voltages exceeding V_CC or GND on any signal terminal are clamped by internal diodes. Limit forward-diode current to maximum current rating.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_CC		2	12	V
V_NC, V_NO, V_COM, V_IN		0	V_CC	V

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TS12A44513, TS12A44514, TS12A44515		UNIT
		D	PW
		14 PINS	14 PINS
R_θJA	Junction-to-ambient thermal resistance	89.8	119.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	49.6	48.4
R_θJB	Junction-to-board thermal resistance	44.4	61.3
ψ_JT	Junction-to-top characterization parameter	13.8	5.7
ψ_JB	Junction-to-board characterization parameter	44.1	60.7

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics for 5-V Supply⁽¹⁾

V_CC = 4.5 V to 5.5 V, V_INH = 2.4 V, V_INL = 0.8 V, T_A = –40°C to 85°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	T_A	MIN	TYP⁽²⁾	MAX	UNIT
ANALOG SWITCH
V_COM, V_NO, V_NC	Analog signal range			0		V_CC	V
R_on	ON-state resistance	V_CC = 4.5 V, V_COM = 3.5 V, I_COM = 1 mA	25°C		12	20	Ω
R_on	ON-state resistance	V_CC = 4.5 V, V_COM = 3.5 V, I_COM = 1 mA	Full			30	Ω
R_on(flat)	ON-state resistance flatness	V_COM = 1 V, 2 V, 3 V, I_COM = 1 mA	25°C		1	3	Ω
R_on(flat)	ON-state resistance flatness	V_COM = 1 V, 2 V, 3 V, I_COM = 1 mA	Full			4	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 4.5 V, I_COM = 5 mA, V_NO or V_NC = 3 V	25°C			3	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 4.5 V, I_COM = 5 mA, V_NO or V_NC = 3 V	T_MIN to T_MAX			4	Ω
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 1 V, V_NO or V_NC = 4.5 V	25°C			1	nA
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 1 V, V_NO or V_NC = 4.5 V	Full			10	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 1 V, V_NO or V_NC = 4.5 V	25°C			1	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 1 V, V_NO or V_NC = 4.5 V	Full			10	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 4.5 V, V_NO or V_NC = 4.5 V	25°C			1	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 5.5 V, V_COM = 4.5 V, V_NO or V_NC = 4.5 V	Full			10	nA
DIGITAL CONTROL INPUT (IN)
V_IH	Input logic high		Full	2.4		V_CC	V
V_IL	Input logic low		Full	0		0.8	V
I_IH, I_IL	Input leakage current	V_IN = V_CC, 0 V	Full			0.01	μA
DYNAMIC
t_ON	Turn-on time	see Figure 2	25°C		45	100	ns
t_ON	Turn-on time	see Figure 2	Full			125	ns
t_OFF	Turn-off time	see Figure 2	25°C		35	50	ns
t_OFF	Turn-off time	see Figure 2	Full			70	ns
Q_C	Charge injection⁽⁴⁾	C_L = 1 nF, V_NO = 0 V, R_S = 0 Ω, See Figure 1	25°C		–1.5		pC
C_NO(OFF), C_NC(OFF)	NO, NC OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(OFF)	COM OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(ON)	COM ON capacitance	f = 1 MHz, See Figure 4	25°C		19		pF
C_I	Digital input capacitance	V_IN = V_CC, 0 V	25°C		2		pF
BW	Bandwidth	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS,	25°C		530		MHz
O_ISO	OFF isolation	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		–94		dB
THD	Total harmonic distortion	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		0.09%
SUPPLY
I_CC	Supply Current	V_IN = V_CC, 0 V	25°C		0.05		μA
I_CC	Supply Current	V_IN = V_CC, 0 V	Full		0.1		μA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(2) Typical values are at T_A = 25°C.

(3) Leakage parameters are 100% tested at maximum-rated hot operating temperature, and are ensured by correlation at 25°C.

(4) Specified by design, not production tested

(5) ΔR_ON = R_ON(MAX) – R_ON(MIN)

6.6 Electrical Characteristics for 12-V Supply⁽¹⁾

V_CC = 11.4 V to 12.6 V, V_INH = 5 V, V_INL = 0.8 V, T_A = –40°C to 85°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	T_A	MIN	TYP⁽²⁾	MAX	UNIT
ANALOG SWITCH
V_COM, V_NO, V_NC	Analog signal range			0		V_CC	V
R_on	ON-state resistance	V_CC = 11.4 V, V_COM = 10 V, I_COM = 1 mA	25°C		6.5	10	Ω
R_on	ON-state resistance	V_CC = 11.4 V, V_COM = 10 V, I_COM = 1 mA	Full			15	Ω
R_on(flat)	ON-state resistance flatness	V_CC = 11.4 V, V_COM = 2 V, 5 V, 10 V, I_COM = 1 mA	25°C		1.5	3	Ω
R_on(flat)	ON-state resistance flatness	V_CC = 11.4 V, V_COM = 2 V, 5 V, 10 V, I_COM = 1 mA	Full			4	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 11.4 V, I_COM = 5 mA, V_NO or V_NC = 10 V	25°C			2.5	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 11.4 V, I_COM = 5 mA, V_NO or V_NC = 10 V	T_MIN to T_MAX			3	Ω
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 1 V, V_NO or V_NC = 10 V	25°C			1	nA
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 1 V, V_NO or V_NC = 10 V	Full			10	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 1 V, V_NO or V_NC = 10 V	25°C			1	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 1 V, V_NO or V_NC = 10 V	Full			10	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 10 V, V_NO or V_NC = 10 V	25°C			1	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 12.6 V, V_COM = 10 V, V_NO or V_NC = 10 V	Full			10	nA
DIGITAL CONTROL INPUT (IN)
V_IH	Input logic high		Full	5		V_CC	V
V_IL	Input logic low		Full	0		0.8	V
I_IH, I_IL	Input leakage current	V_IN = V_CC, 0 V	Full			0.001	μA
DYNAMIC
t_ON	Turn-on time	See Figure 2	25°C		25	75	ns
t_ON	Turn-on time	See Figure 2	Full			80	ns
t_OFF	Turn-off time	See Figure 2	25°C		20	45	ns
t_OFF	Turn-off time	See Figure 2	Full			50	ns
Q_C	Charge injection⁽⁴⁾	C_L = 1 nF, V_NO = 0 V, R_S = 0 Ω, See Figure 1	25°C		–10.5		pC
C_NO(OFF), C_NC(OFF)	NO, NC OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(OFF)	COM OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(ON)	COM ON capacitance	f = 1 MHz, See Figure 4	25°C		21.5		pF
C_I	Digital input capacitance	V_IN = V_CC, 0 V	25°C		2		pF
BW	Bandwidth	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS,	25°C		530		MHz
O_ISO	OFF isolation	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		–95		dB
THD	Total harmonic distortion	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		0.07%
SUPPLY
I_CC	Supply Current	V_IN = V_CC, 0 V	25°C		0.05		μA
I_CC	Supply Current	V_IN = V_CC, 0 V	Full		0.2		μA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(2) Typical Values are at T_A = 25°C.

(3) Leakage parameters are 100% tested at maximum-rated hot operating temperature, and are ensured by correlation at 25°C.

(4) Specified by design, not production tested

(5) ΔR_ON = R_ON(MAX) – R_ON(MIN)

6.7 Electrical Characteristics for 3-V Supply⁽¹⁾

V_CC = 3 V to 3.6 V, T_A = –40°C to 85°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	T_A	MIN	TYP⁽²⁾	MAX	UNIT
ANALOG SWITCH
V_COM, V_NO, V_NC	Analog signal range			0		V_CC	V
R_on	ON-state resistance	V_CC = 3 V, V_COM = 1.5 V, I_NO = 1 mA,	25°C		20	40	Ω
R_on	ON-state resistance	V_CC = 3 V, V_COM = 1.5 V, I_NO = 1 mA,	Full			50	Ω
R_on(flat)	ON-state resistance flatness	V_CC = 3 V, V_COM = 1 V, 1.5 V, 2 V, I_COM = 1 mA	25 °C		1	3	Ω
R_on(flat)	ON-state resistance flatness	V_CC = 3 V, V_COM = 1 V, 1.5 V, 2 V, I_COM = 1 mA	Full			4	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 2.7 V, I_COM = 5 mA, V_NO or V_NC = 1.5 V	25°C			3.5	Ω
ΔR_on	ON-state resistance matching between channels⁽⁵⁾	V_CC = 2.7 V, I_COM = 5 mA, V_NO or V_NC = 1.5 V	T_MIN to T_MAX			4.5	Ω
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 1 V, V_NO or V_NC = 3 V	25°C			1	nA
I_NO(OFF), I_NC(OFF)	NO, NC OFF leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 1 V, V_NO or V_NC = 3 V	Full			10	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 1 V, V_NO or V_NC = 3 V	25°C			1	nA
I_COM(OFF)	COM OFF leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 1 V, V_NO or V_NC = 3 V	Full			10	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 3 V, V_NO or V_NC = 3 V	25°C			1	nA
I_COM(ON)	COM ON leakage current⁽³⁾	V_CC = 3.6 V, V_COM = 3 V, V_NO or V_NC = 3 V	Full			10	nA
DIGITAL CONTROL INPUT (IN)
V_IH	Input logic high		Full	2.4		V_CC	V
V_IL	Input logic low		Full	0		0.8	V
I_IH, I_IL	Input leakage current	V_IN = V_CC, 0 V	Full			0.01	μA
DYNAMIC
t_ON	Turn-on time⁽⁴⁾	See Figure 2	25°C		70	120	ns
t_ON	Turn-on time⁽⁴⁾	See Figure 2	Full			175	ns
t_OFF	Turn-off time⁽⁴⁾	See Figure 2	25°C		50	80	ns
t_OFF	Turn-off time⁽⁴⁾	See Figure 2	Full			120	ns
Q_C	Charge injection⁽⁴⁾	C_L = 1 nF, See Figure 1	25°C		–0.5		pC
C_NO(OFF), C_NC(OFF)	NO, NC OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(OFF)	COM OFF capacitance	f = 1 MHz, See Figure 4	25°C		8		pF
C_COM(ON)	COM ON capacitance	f = 1 MHz, See Figure 4	25°C		17		pF
C_I	Digital input capacitance	V_IN = V_CC, 0 V	25°C		2		pF
BW	Bandwidth	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		510		MHz
O_ISO	OFF isolation	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		–94		dB
THD	Total harmonic distortion	R_L = 50 Ω, C_L = 15 pF, V_NO = 1 V_RMS, f = 100 kHz	25°C		0.27%
SUPPLY
I_CC	Supply Current	V_IN = V_CC, 0 V	25°C		0.05		μA
I_CC	Supply Current	V_IN = V_CC, 0 V	Full		0.2		μA