TS12A44514

ACTIVE

12-V, 1:1 (SPST), 4-channel general-purpose analog switch (active high)

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Product details

Parameters

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Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other Analog switches & muxes

Features

  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15-Ω Maximum With 12-V Supply
    • 20-Ω Maximum With 5-V Supply
    • 50-Ω Maximum With 3.3-V Supply
  • ΔRON Matching
    • 2.5-Ω (Max) at 12 V
    • 3-Ω (Max) at 5 V
    • 3.5-Ω (Max) at 3.3 V
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85&25;C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns
    (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply
  • Available in 14-Pin TSSOP Package or 14-Pin
    SOIC Package
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Description

The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.

These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.

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Technical documentation

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Type Title Date
* Data sheet TS12A4451x Low ON-State Resistance 4-Channel SPST CMOS Analog Switches datasheet (Rev. B) Feb. 01, 2016
Application note Multiplexers and Signal Switches Glossary (Rev. A) Jun. 09, 2021
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Application note Preventing Excess Power Consumption on Analog Switches Jul. 03, 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004

Design & development

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Hardware development

INTERFACE ADAPTER Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


CAD/CAE symbols

Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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