SCDS430A December   2020  – May 2021 TS3DV642-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performances
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Demultiplexing HDMI Signals
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - Multiplexing HDMI Signals
    4. 9.4 Systems Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUA|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Feature Description

The TS3DV642-Q1 is based on proprietary TI technology which uses FET switches driven by a high-voltage generated from an integrated charge-pump to achieve a low on-state resistance. TS3DV642-Q1 has 6 differential channel or 12 single ended channel bidirectional switches with a high bandwidth. TS3DV642-Q1 uses an extremely low power technology and uses only 45 µA ICC in active mode. The device has integrated ESD that can support up to 3-kV Human-Body Model (HBM) and 1-kV Charge Device Model (CDM). TS3DV642-Q1 is offered in a 42-pin QFN package (9 mm x 3.5 mm) with 0.5 mm pitch. The device can support analog I/O signal in 0 to 5.5 V range. TS3DV642-Q1 also has a special feature that prevents the device from back-powering when the VCC supply is not available and an analog signal is applied on the I/O pin. In this situation this special feature prevents leakage current in the device. The TS3DV642-Q1 is not designed for passing signals with negative swings.