SLLSFM9A March 2021 – December 2023 TUSB216I
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Table 7-3 lists the memory-mapped registers for the TUSB216 registers. All register offset addresses not listed in Table 7-3 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0x1 | EDGE_BOOST | This register is setting EDGE BOOST level. | Go |
0x3 | CONFIGURATION | This register is selecting device mode. | Go |
0xE | DC_BOOST | This register is setting DC BOOST level. | Go |
0x25 | RX_SEN | This register is setting RX Sensitivity level. | Go |
Complex bit access types are encoded to fit into small table cells. Table 7-4 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
RH | H R | Set or cleared by hardware Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
EDGE_BOOST is shown in Figure 7-1 and described in Table 7-5.
Return to Summary Table.
This register is setting EDGE BOOST level.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ACB_LVL | RESERVED | ||||||
RH/W-X | RH/W-X | ||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-4 | ACB_LVL | RH/W | X | XXXXb (sampled at startup from BOOST pin) 0x0 = BOOST PIN LEVEL 0 (lowest edge boost setting) 0x3 = BOOST PIN LEVEL 1 0x6 = BOOST PIN LEVEL 2 0xA = BOOST PIN LEVEL 3 0xF = (highest edge boost setting) |
3-0 | RESERVED | RH/W | X | These bits are reserved bits and set by hardware at reset. |
CONFIGURATION is shown in Figure 7-2 and described in Table 7-6.
Return to Summary Table.
This register is selecting device mode.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | CFG_ACTIVE | ||||||
RH/W-X | RH/W-0x1 | ||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | RESERVED | RH/W | X |
These bits are
reserved bits and set by hardware at reset. |
0 | CFG_ACTIVE | RH/W | 0x1 |
Configuration mode
0x0 = NORMAL MODE 0x1 = CONFIGURATION MODE |
DC_BOOST is shown in Figure 7-3 and described in Table 7-7.
Return to Summary Table.
This register is setting DC BOOST level.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | DCB_LVL | ||||||
RH/W-X | RH/W-X | ||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-4 | RESERVED | RH/W | X | These bits are reserved bits and set by hardware at reset. |
3-0 | DCB_LVL | RH/W | X | XXXXb (sampled at startup from BOOST pin) 0x0 = BOOST PIN LEVEL 0 (lowest dc boost setting) 0x2 = BOOST PIN LEVEL 1 and 2 0x6 = BOOST PIN LEVEL 3 0xF = (highest dc boost setting) |
RX_SEN is shown in Figure 7-4 and described in Table 7-8.
Return to Summary Table.
This register is setting RX Sensitivity level.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RX_SEN | |||||||
RH/W-X | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | RX_SEN | RH/W | X | XXXXb (sampled at startup from RX_SEN pin) 0x0 = RX_SEN LEVEL LOW 0x33 = RX_SEN LEVEL MID 0x66 = RX_SEN LEVEL HIGH 0xFF = (highest setting) |