SCES651K June   2006  – October 2023 TXS0104E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: ZXU, YZT, and NMN
    5. 6.5  Thermal Information: D, PW, and RGY
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements: VCCA = 1.8 V ± 0.15 V
    8. 6.8  Timing Requirements: VCCA = 2.5 V ± 0.2 V
    9. 6.9  Timing Requirements: VCCA = 3.3 V ± 0.3 V
    10. 6.10 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    11. 6.11 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    12. 6.12 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    13. 6.13 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Load Circuits
    2. 7.2 Voltage Waveforms
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Power Up
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pullup and Pulldown Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 3.6 V. VCCA must be less than or equal to VCCB. The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104E is designed so that the OE input circuit is supplied by VCCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TXS0104ED (SOIC, 14)8.65 mm × 6 mm
PW (TSSOP, 14)5 mm × 6.4 mm
ZXU (BGA, 12)2 mm × 2.5 mm
RGY (VQFN, 14)3.5 mm × 3.5 mm
YZT (DSBGA, 12)2.25 mm × 1.75 mm
NMN (nFBGA, 12)2 mm × 2.5 mm
BQA (WQFN, 12) 3 mm × 2.5 mm
RUT (UQFN, 12) 2.00 mm × 1.70 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable
GUID-FA7D7BDE-EA67-43B3-9C2C-6210A2806C63-low.png Transfer Characteristics of an N-Channel Transistor