SLUSDS3A March   2020  – January 2024 UCC21739-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Propagation Delay
      1. 6.1.1 Regular Turn-OFF
    2. 6.2 Input Deglitch Filter
    3. 6.3 Active Miller Clamp
      1. 6.3.1 External Active Miller Clamp
    4. 6.4 Under Voltage Lockout (UVLO)
      1. 6.4.1 VCC UVLO
      2. 6.4.2 VDD UVLO
    5. 6.5 OC (Over Current) Protection
      1. 6.5.1 OC Protection with 2-Level Turn-OFF
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply
      2. 7.3.2  Driver Stage
      3. 7.3.3  VCC and VDD Undervoltage Lockout (UVLO)
      4. 7.3.4  Active Pulldown
      5. 7.3.5  Short Circuit Clamping
      6. 7.3.6  External Active Miller Clamp
      7. 7.3.7  Overcurrent and Short Circuit Protection
      8. 7.3.8  2-Level Turn-off
      9. 7.3.9  Fault ( FLT, Reset and Enable ( RST/EN)
      10. 7.3.10 Isolated Analog to PWM Signal Function
    4. 7.4 Device Functional Modes
  9. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input filters for IN+, IN- and RST/EN
        2. 8.2.2.2 PWM Interlock of IN+ and IN-
        3. 8.2.2.3 FLT, RDY and RST/EN Pin Circuitry
        4. 8.2.2.4 RST/EN Pin Control
        5. 8.2.2.5 Turn-On and Turn-Off Gate Resistors
        6. 8.2.2.6 External Active Miller Clamp
        7. 8.2.2.7 Overcurrent and Short Circuit Protection
          1. 8.2.2.7.1 Protection Based on Power Modules with Integrated SenseFET
          2. 8.2.2.7.2 Protection Based on Desaturation Circuit
          3. 8.2.2.7.3 Protection Based on Shunt Resistor in Power Loop
        8. 8.2.2.8 Isolated Analog Signal Sensing
          1. 8.2.2.8.1 Isolated Temperature Sensing
          2. 8.2.2.8.2 Isolated DC Bus Voltage Sensing
        9. 8.2.2.9 Higher Output Current Using an External Current Buffer
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
Protection Based on Desaturation Circuit

For SiC MOSFET and IGBT modules without SenseFET, desaturation (DESAT) circuit is the most popular circuit which is adopted for overcurrent and short circuit protection. The circuit consists of a current source, a resistor, a blanking capacitor and a diode. Normally the current source is provided from the gate driver, when the device turns on, a current source charges the blanking capacitor and the diode forward biased. During normal operation, the capacitor voltage is clamped by the switch VCE voltage. When short circuit happens, the capacitor voltage is quickly charged to the threshold voltage which triggers the device shutdown. For the UCC21739-Q1, the OC pin does not feature an internal current source. The current source should be generated externally from the output power supply. When UCC21739-Q1 is in OFF state, the OC pin is pulled down by an internal MOSFET, which creates an offset voltage on OC pin. By choosing R1 and R2 significantly higher than the pulldown resistance of the internal MOSFET, the offset can be ignored. When UCC21739-Q1 is in ON state, the OC pin is high impedance. The current source is generated by the output power supply VDD and the external resistor divider R1, R2 and R3. The overcurrent detection threshold voltage of the IGBT is:

Equation 11. GUID-21488505-FACB-46AB-99AC-7E2E860949A8-low.gif

The blanking time of the detection circuit is:

Equation 12. GUID-2382C00B-1F5E-4AB8-A161-4C999D777A20-low.gif

Where:

  • VOCTH is the detection threshold voltage of the gate driver
  • R1, R2 and R3 are the resistance of the voltage divider
  • CBLK is the blanking capacitor
  • VF is the forward voltage of the high voltage diode DHV

The modified desaturation circuit has all the benefits of the conventional desaturation circuit. The circuit has negligible power loss, and is easy to implement. The detection threshold voltage of IGBT and blanking time can be programmed by external components. Different with the conventional desaturation circuit, the overcurrent detection threshold voltage of the IGBT can be modified to any voltage level, either higher or lower than the detection threshold voltage of the driver. A parallel schottky diode can be connected between OC and COM pins to prevent the negative voltage on the OC pin in noisy system. Since the desaturation circuit measures the VCE of the IGBT or VDS of the SiC MOSFET, not directly the current, the accuracy of the protection is not as high as the SenseFET based protection method. The current threshold cannot be accurately controlled in the protection.

GUID-25034549-A5CE-4E1D-9D69-F14C84D4F578-low.gif Figure 8-9 Overcurrent and Short Circuit Protection Based on Desaturation Circuit