SLUS829G August 2008 – February 2020 UCC2897A
The UCC2897A uses a high voltage JFET to provide the start-up current for the controller until a bootstrap-type rail becomes available on VDD pin. The JFET will be turned off after the VDD pin voltage exceeds the UVLO threshold. Then the device enters normal operation mode. If the line voltage is abnormal, the device enters line under voltage or line over voltage mode. During light load or load transient, the device may enter pulse skipping mode if the feedback voltage FB is less than a certain threshold. Figure 27 shows the mode transition diagram.