SLUS270G March   1999  – May 2020 UCC2800 , UCC2801 , UCC2802 , UCC2803 , UCC2804 , UCC2805

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Detailed Pin Description
        1. 9.3.1.1 COMP
        2. 9.3.1.2 FB
        3. 9.3.1.3 CS
        4. 9.3.1.4 RC
        5. 9.3.1.5 GND
        6. 9.3.1.6 OUT
        7. 9.3.1.7 VCC
        8. 9.3.1.8 Pin 8 (REF)
      2. 9.3.2  Undervoltage Lockout (UVLO)
      3. 9.3.3  Self-Biasing, Active Low Output
      4. 9.3.4  Reference Voltage
      5. 9.3.5  Oscillator
      6. 9.3.6  Synchronization
      7. 9.3.7  PWM Generator
      8. 9.3.8  Minimum Off-Time Setting (Dead-Time Control)
      9. 9.3.9  Leading Edge Blanking
      10. 9.3.10 Minimum Pulse Width
      11. 9.3.11 Current Limiting
      12. 9.3.12 Overcurrent Protection and Full Cycle Restart
      13. 9.3.13 Soft Start
      14. 9.3.14 Slope Compensation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Operation
      2. 9.4.2 UVLO Mode
      3. 9.4.3 Soft Start Mode
      4. 9.4.4 Fault Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Current Sensing Network
        2. 10.2.2.2 Gate Drive Resistor
        3. 10.2.2.3 Vref Capacitor
        4. 10.2.2.4 RTCT
        5. 10.2.2.5 Start-Up Circuit
        6. 10.2.2.6 Voltage Feedback Compensation
          1. 10.2.2.6.1 Power Stage Gain, Zeroes, and Poles
          2. 10.2.2.6.2 Compensation Loop
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Support Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
    5. 13.5 Related Links
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The design starts with selecting an appropriate bulk capacitor.

The primary side bulk capacitor is selected based on the power level. Based on the desired minimum bulk voltage level, the bulk capacitor value can be calculated as Equation 8.

Equation 8. GUID-2FC46CFA-4D3A-4664-85C9-70EFCE820262-low.gif

In Equation 8, PIN is the maximum output power divided by target efficiency, VIN(min)  is the minimum AC input voltage RMS value. VBULK(min) is the target minimum bulk voltage, and fLINE is the line frequency.

Based on the equation, to achieve 75-V minimum bulk voltage, assuming 85% converter efficiency and 47-Hz minimum line frequency, the bulk capacitor must be larger than 127 µF and 180 µF was chosen in the design, considering the tolerance of the capacitors.

The transformer design starts with selecting a suitable switching frequency. Generally the switching frequency selection is based on the tradeoff between the converter size and efficiency, based on the simple Flyback topology. Normally, higher switching frequency results in smaller transformer size. However, the switching loss is going to be increased and hurts the efficiency. Sometimes, the switching frequency is selected to avoid certain communication band to prevent the noise interference with the communication. The frequency selection is beyond the scope of this data sheet.

The switching frequency is selected as 110 kHz, to minimize the transformer size. At the same time, the regulations start to have limit on EMI noise at 150 kHz, design 110-kHz switching frequency can help to minimize the EMI filter size.

Then the transformer turns ratio can be selected based on the desired MOSFET voltage rating and diode voltage rating. Because maximum input voltage is 265 V AC, the peak voltage can be calculated as Equation 9.

Equation 9. GUID-0C535105-33D7-42B3-A2D0-3752DBF67959-low.gif

To minimize the cost of the system, the popular 650-V MOSFET is selected. Considering the design margin and extra voltage ringing on the MOSFET drain, the reflected output voltage must be less than 120 V. The transformer turns ratio can be selected as Equation 10.

Equation 10. GUID-48220045-C225-4613-B1D8-DDB41CB431F4-low.gif

The diode voltage stress is the output voltage plus the reflected input voltage. The voltage stress on the diode can be calculated as Equation 11.

Equation 11. GUID-4A4D1BDF-3B75-4AF2-B77F-F4B2D71E7E42-low.gif

Consider the ringing voltage spikes and voltage derating the diode voltage rating must be higher than 50 V.

The transformer inductance selection is based on the CCM condition. Larger inductor would allow the converter stays in CCM longer. However, it tends to increase the transformer size. Normally, the transformer magnetizing inductor is selected so that the converter enters CCM operation at about 50% load at minimum line voltage. This would be a tradeoff between the transformer size and the efficiency. In this particular design, due to the higher output current, it is desired to keep the converter deeper in the CCM and minimize the conduction loss and output ripple. The converter enters CCM operation at about 10% load at minimum bulk voltage.

The inductor can be calculated as Equation 12.

Equation 12. GUID-D65B133B-581D-4067-BCCF-2AFD77722F86-low.gif

In this equation, the switching frequency is 110 kHz. Therefore, the transformer inductance must be about
1.7 mH. 1.5 mH is chosen as the magnetizing inductor value.

The auxiliary winding provides the power for UCC2800 normal operation. The auxiliary winding voltage is the output voltage reflected to the primary side. It is desired to have higher reflected voltage so that the IC can quickly get energy from the transformer and make the heavy load startup easier. However, the high the reflect voltage makes the IC consumes more power. Therefore, tradeoff is required.

In this design, the auxiliary winding voltage is selected the same as the output voltage so that it is above the UVLO level and keep the IC and driving loss low. Therefore, the auxiliary winding to the output winding turns ratio is selected as Equation 13.

Equation 13. GUID-D959AFEE-201C-4B9F-ADF9-1C0C52C11581-low.gif

Based on calculated inductor value and the switching frequency, the current stress of the MOSFET and diode can be calculated.

The peak current of the MOSFET can be calculated as Equation 14.

Equation 14. GUID-5531D308-D87C-4561-9147-F286ADC92D82-low.gif

The MOSFET peak current is 1.425 A.

The diode peak current is the reflected MOSFET peak current on the secondary side.

Equation 15. GUID-22335C7F-4A4B-4C5B-9655-D9B161EEED2A-low.gif

The RMS current of the MOSFET can be calculated as Equation 16.

Equation 16. GUID-B3961C64-E6BD-42E3-82CC-2C68FFAFCCD9-low.gif

In Equation 16, D is the MOSFET duty cycle at minimum bulk voltage and it can be calculated as Equation 17.

Equation 17. GUID-01C06FB4-6792-44EF-B781-CE7AD069FBB4-low.gif

The MOSFET RMS current is 0.75 A. Therefore, IRFB9N65A is selected as primary side MOSFET.

The diode average current is the output current 4 A with 60-V rating and 14.25-A peak current capability, 48CTQ060-1 is selected.

Output capacitor is selected based on the output voltage ripple requirement. In this design, 0.1% voltage ripple is assumed. Based on the 0.1% ripple requirement, the capacitor value can be selected based on Equation 18.

Equation 18. GUID-42CCF5F7-6918-47D7-97B8-973FAE1B3C90-low.gif

Consider the tolerance and temperature effect, together the ripple current rating of the capacitors, the output capacitor of 3 of 680 µF in parallel was selected.

After the power stage is designed, the surround components can be selected.