The recommended input supply voltage (VCC1) for the UCC53x0 device is from 3 V to 15 V. The lower limit of the range of output bias-supply voltage (VCC2) is determined by the internal UVLO protection feature of the device. The VCC1 and VCC2 voltages should not fall below their respective UVLO thresholds for normal operation, or else the gate-driver outputs can become clamped low for more than 50 μs by the UVLO protection feature. For more information on UVLO, see the Undervoltage Lockout (UVLO) section. The higher limit of the VCC2 range depends on the maximum gate voltage of the power device that is driven by the UCC53x0 device, and should not exceed the recommended maximum VCC2 of 33 V. A local bypass capacitor should be placed between the VCC2 and VEE2 pins, with a value of 220-nF to 10-μF for device biasing. TI recommends placing an additional 100-nF capacitor in parallel with the device biasing capacitor for high frequency filtering. Both capacitors should be positioned as close to the device as possible. Low-ESR, ceramic surface-mount capacitors are recommended. Similarly, a bypass capacitor should also be placed between the VCC1 and GND1 pins. Given the small amount of current drawn by the logic circuitry within the input side of the UCC53x0 device, this bypass capacitor has a minimum recommended value of 100 nF.
If only a single, primary-side power supply is available in an application, isolated power can be generated for the secondary side with the help of a transformer driver such as Texas Instruments' SN6501 or SN6505A. For such applications, detailed power supply design and transformer selection recommendations are available in SN6501 Transformer Driver for Isolated Power Supplies data sheet and SN6505A Low-Noise 1-A Transformer Drivers for Isolated Power Supplies data sheet.