Product details

Number of channels 1 Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Split output Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input VCC (min) (V) 3 Input VCC (max) (V) 15 Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Catalog Bus voltage (max) (V) 2121 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
Number of channels 1 Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Split output Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input VCC (min) (V) 3 Input VCC (max) (V) 15 Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Catalog Bus voltage (max) (V) 2121 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
SOIC (D) 8 29.4 mm² 4.9 x 6 SOIC (DWV) 8 67.275 mm² 5.85 x 11.5
  • Feature Options
    • Split Outputs (UCC53x0S)
    • UVLO Referenced to GND2 (UCC53x0E)
    • Miller Clamp Option (UCC53x0M)
  • 8-pin D (4-mm Creepage) and
    DWV (8.5mm Creepage) Package
  • 60-ns (Typical) Propagation Delay
  • 100-kV/µs Minimum CMTI
  • Isolation Barrier Life > 40 Years
  • 3-V to 15-V Input Supply Voltage
  • Up to 33-V Driver Supply Voltage
    • 8-V and 12-V UVLO Options
  • Negative 5-V Handling Capability on Input Pins
  • Safety-Related Certifications:
    • 7000-VPK Isolation DWV (Planned) and 4242-VPK Isolation D per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1
    • 5000-VRMS DWV and 3000-VRMS D
      Isolation Rating for 1 minute per UL 1577
    • CQC Certification per GB4943.1-2011
      D and DWV (Planned)
  • CMOS Inputs
  • Operating Temperature: –40°C to +125°C
  • Feature Options
    • Split Outputs (UCC53x0S)
    • UVLO Referenced to GND2 (UCC53x0E)
    • Miller Clamp Option (UCC53x0M)
  • 8-pin D (4-mm Creepage) and
    DWV (8.5mm Creepage) Package
  • 60-ns (Typical) Propagation Delay
  • 100-kV/µs Minimum CMTI
  • Isolation Barrier Life > 40 Years
  • 3-V to 15-V Input Supply Voltage
  • Up to 33-V Driver Supply Voltage
    • 8-V and 12-V UVLO Options
  • Negative 5-V Handling Capability on Input Pins
  • Safety-Related Certifications:
    • 7000-VPK Isolation DWV (Planned) and 4242-VPK Isolation D per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1
    • 5000-VRMS DWV and 3000-VRMS D
      Isolation Rating for 1 minute per UL 1577
    • CQC Certification per GB4943.1-2011
      D and DWV (Planned)
  • CMOS Inputs
  • Operating Temperature: –40°C to +125°C

The UCC53x0 is a family of single-channel, isolated gate drivers designed to drive MOSFETs, IGBTs, SiC MOSFETs, and GaN FETs (UCC5350SBD). The UCC53x0S provides a split output that controls the rise and fall times individually. The UCC53x0M connects the gate of the transistor to an internal clamp to prevent false turnon caused by Miller current. The UCC53x0E has its UVLO2 referenced to GND2 to get a true UVLO reading.

The UCC53x0 is available in a 4 mm SOIC-8 (D) or 8.5 mm SOIC-8 (DWV) package and can support isolation voltage up to 3 kVRMS and 5 kVRMS respectively. With these various options the UCC53x0 family is a good fit for motor drives and industrial power supplies.

Compared to an optocoupler, the UCC53x0 family has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.

The UCC53x0 is a family of single-channel, isolated gate drivers designed to drive MOSFETs, IGBTs, SiC MOSFETs, and GaN FETs (UCC5350SBD). The UCC53x0S provides a split output that controls the rise and fall times individually. The UCC53x0M connects the gate of the transistor to an internal clamp to prevent false turnon caused by Miller current. The UCC53x0E has its UVLO2 referenced to GND2 to get a true UVLO reading.

The UCC53x0 is available in a 4 mm SOIC-8 (D) or 8.5 mm SOIC-8 (DWV) package and can support isolation voltage up to 3 kVRMS and 5 kVRMS respectively. With these various options the UCC53x0 family is a good fit for motor drives and industrial power supplies.

Compared to an optocoupler, the UCC53x0 family has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.

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Technical documentation

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Type Title Date
* Data sheet UCC53x0 Single-Channel Isolated Gate Drivers datasheet (Rev. F) PDF | HTML 06 Dec 2018
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. U) 07 Feb 2023
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 02 Dec 2022
Application note The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dec 2021
Technical article The impact of an isolated gate driver’s input stage for motor-drive applications 29 Sep 2020
E-book Ein Techniker-Leitfaden für Industrieroboter-Designs 25 Mar 2020
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
E-book E-book: An engineer’s guide to industrial robot designs 12 Feb 2020
Certificate CQC Product Certificate 3 22 Jul 2019
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Application note Enable Function with Unused Differential Input 11 Jul 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Functional safety information Isolation in solar power converters: Understanding the IEC62109-1 safety standar (Rev. A) 18 May 2018
EVM User's guide UCC5390ECDWV Isolated Gate Driver Evaluation Module User's Guide 25 Jan 2018
User guide UCC53x0xD Evaluation Module 21 Jun 2017
Analog Design Journal Common-mode transient immunity for isolated gate drivers 30 Oct 2015
White paper High-voltage reinforced isolation: Definitions and test methodologies 16 Oct 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC5320SCEVM-058 — UCC5320SC isolated gate driver evaluation module

UCC5320SCEVM is an Evaluation Module used to evaluate UCC53xx family of devices and it provides user with flexiblity of configuring  driver to Split output, miller clamp or UVLO based on the device used . The EVM features enough test points & jumper options for one to evaluate the device (...)
User guide: PDF
Not available on TI.com
Simulation model

UCC5350MCD PSpice Transient Model (Rev. A)

SLLM368A.ZIP (54 KB) - PSpice Model
Simulation model

UCC5350MCD Unencrypted PSpice Transient Model (Rev. A)

SLLM367A.ZIP (3 KB) - PSpice Model
Simulation model

UCC5350SBD PSpice Transient Model

SLLM379.ZIP (53 KB) - PSpice Model
Simulation model

UCC5350SBD Unencrypted PSpice Transient Model

SLLM378.ZIP (3 KB) - PSpice Model
Calculation tool

UCC53x0 Gate Resistor and Thermal Calculator Tool

SLURAY7.ZIP (1677 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

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This reference design is a GaN-based 3-kW phase-shifted full bridge (PSFB) targeting maximum power density. The design has an active clamp to minimize voltage stress on the secondary synchronous rectifier MOSFETs enabling use of lower voltage-rating MOSFETs with better figure-of-merit (FoM). (...)
Test report: PDF
Reference designs

TIDA-01599 — TÜV SÜD-assessed safe torque off (STO) reference design for industrial drives (IEC 61800-5-2)

This reference design outlines a safe torque off (STO) subsystem for a three-phase inverter with CMOS input isolated IGBT gate drivers. The STO subsystem employs a dual-channel architecture (1oo2) with a hardware fault tolerance of 1 (HFT=1). It is implemented following a de-energize trip concept. (...)
Design guide: PDF
Schematic: PDF
Reference designs

PMP21639 — 65-W USB Type-C™ high density active clamp flyback with GaN reference design

This reference design is a high density USB adapter that uses the UCC28780 active clamp flyback controller and LMG3411R150 GaN with integrated driver and protection. The maximum power rating is 65W at 20V output but is adjustable for 20V/15V/9V/5V output voltage and 3A.  This design reaches a (...)
Test report: PDF
Schematic: PDF
Reference designs

TIDA-01420 — Basic Isolated Three-Phase Compact Power Stage Reference Design for Industrial Drives

This three-phase, compact power stage reference design for industrial drives, which uses a UCC53xx gate driver to support basic capacitive isolation requirements, provides an increased lifespan and better propagation delay match over optocouplers to minimize inverter deadband distortions and (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
SOIC (D) 8 View options
SOIC (DWV) 8 View options

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