SLUSF42 December   2022 UCC5871-Q1

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Pin Configuration and Functions
  6. 6Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety Limiting Values
    8. 6.8  Electrical Characteristics
    9. 6.9  SPI Timing Requirements
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7Layout
    1. 7.1 Layout Guidelines
      1. 7.1.1 Component Placement
      2. 7.1.2 Grounding Considerations
      3. 7.1.3 High-Voltage Considerations
      4. 7.1.4 Thermal Considerations
    2. 7.2 Layout Example
  8. 8Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Split output driver provides 30-A peak source and 30-A peak sink currents
  • Interlock and shoot-through protection with 150-ns(max) propagation delay and programmable minimum pulse rejection
  • Primary and secondary side active short circuit (ASC) support
  • Configurable power transistor protections
    • DESAT based short circuit protection
    • Shunt resistor based overcurrent and short circuit protection
    • NTC based overtemperature protection
    • Programmable soft turnoff (STO) and two-level turnoff (2LTOFF) during power transistor faults
  • Functional Safety-Compliant
  • Integrated diagnostics:
    • Built-in self test (BIST) for protection comparators
    • IN+ to transistor gate path integrity
    • Power transistor threshold monitoring
    • Internal clock monitoring
    • Fault alarm (nFLT1) and warning (nFLT2) outputs
  • Integrated 4-A active Miller clamp or optional external drive for Miller clamp transistor
  • Advanced high voltage clamping control
  • Internal and external supply undervoltage and overvoltage protection
  • Active output pulldown and default low outputs with low supply or floating inputs
  • Driver die temperature sensing and overtemperature protection
  • 100-kV/┬Ás minimum common mode transient immunity (CMTI) at VCM = 1000 V
  • SPI based device reconfiguration, verification, supervision, and diagnosis
  • Integrated 10-bit ADC for power transistor temperature, voltage, and current monitoring