SLVSDD7A September 2016 – February 2019 UCD9090A
GPIOs can be configured as outputs that are based on Boolean combinations of up to two ANDs all ORed together (Figure 18). Inputs to the logic blocks can include the first 8 defined GPOs, GPIs and rail-status flags. One rail status type is selectable as an input for each AND gate in a Boolean block. For a selected rail status, the status flags of all active rails can be included as inputs to the AND gate. _LATCH rail-status types stay asserted until cleared by a MFR PMBus command or by a specially configured GPI pin. The different rail-status types are shown in Table 5. See the UCD90xxx Sequencer and System Health Controller PMBus Command Reference for complete definitions of rail-status types. The GPO response can be configured to have a delayed assertion or deassertion. The first 8 GPOs can be chosen as Rail Sequence on/off Dependency. The logic state of the GPO instead of actual pin output is used as dependency condition.
When GPO is set to POWER_GOOD, this POWER_GOOD state is based on the actual voltage measurement on the monitor pins assigned to those rails. For a rail that does not have a monitor pin, or have a monitor pin but without voltage monitoring, its POWER_GOOD state is used by sequencing purpose only, and is not be used by the GPO logic evaluation.