SCHS279E December   1998  – August 2022 CD54HC4511 , CD74HC4511 , CD74HCT4511

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions for 'HC4511 (1)
    3. 5.3  Recommended Operating Conditions for CD74HCT4511 (1)
    4. 5.4  Thermal Information
    5. 5.5  'HC4511 Electrical Characteristics
    6. 5.6  CD74HCT4511 Electrical Characteristics
    7. 5.7  'HC4511 Timing Requirements
    8. 5.8  Switching Characteristics
    9. 5.9  CD74HCT4511 Timing Requirements
    10. 5.10 CD74HCT4511 Switching Characteristics
    11. 5.11 Operating Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 2-V to 6-V VCC operation ('HC4511)
  • 4.5-V to 5.5-V VCC operation (CD74HCT4511)
  • High-output sourcing capability
    • 7.5 mA at 4.5 V (CD74HCT4511)
    • 10 mA at 6 V ('HC4511)
  • Input latches for BCD code storage
  • Lamp test and blanking capability
  • Balanced propagation delays and transition times
  • Significant power reduction compared to LSTTL logic IC's
  • 'HC4511
    • High noise immunity,
      NIL or NIH = 30% of VCC at VCC = 5 V
  • CD74HCT4511
    • Direct LSTTL input logic compatibility, VIL = 0.8 V Maximum, VIH = 2 V minimum
    • CMOS input compatibility, II ≤ 1μA at VOL, VOH